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Paper Abstract and Keywords
Presentation 2015-09-04 11:20
High speed implementation of Hash function on GPU
Nguyen Dat Thuong, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa (NDA) ISEC2015-27
Abstract (in Japanese) (See Japanese page) 
(in English) In order to protect the personal information and high confidential information, encryption technology and hash function are essential technologies. Hash function is suitable for speed up with GPGPU becouse of without complicated conditional branch, no large table and simple calculation processing. This paper presents a speed up implementation of the hash functions MD5 and SHA-1 with GPU using CUDA. Implementation results were examined about the safety of the hash value from the result of the GPU processing time. As a result, processing time of MD5 with Tesla K20Xm is up to 59.9 times faster than the Xeon E5-2610.
Keyword (in Japanese) (See Japanese page) 
(in English) MD5 / SHA-1 / hash function / GPU / CUDA / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 215, ISEC2015-27, pp. 15-19, Sept. 2015.
Paper # ISEC2015-27 
Date of Issue 2015-08-28 (ISEC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ISEC2015-27

Conference Information
Committee ISEC  
Conference Date 2015-09-04 - 2015-09-04 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ISEC 
Conference Code 2015-09-ISEC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) High speed implementation of Hash function on GPU 
Sub Title (in English)  
Keyword(1) MD5  
Keyword(2) SHA-1  
Keyword(3) hash function  
Keyword(4) GPU  
Keyword(5) CUDA  
1st Author's Name Nguyen Dat Thuong  
1st Author's Affiliation National Defense Academy (NDA)
2nd Author's Name Keisuke Iwai  
2nd Author's Affiliation National Defense Academy (NDA)
3rd Author's Name Hidema Tanaka  
3rd Author's Affiliation National Defense Academy (NDA)
4th Author's Name Takakazu Kurokawa  
4th Author's Affiliation National Defense Academy (NDA)
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Date Time 2015-09-04 11:20:00 
Presentation Time 25 
Registration for ISEC 
Paper # IEICE-ISEC2015-27 
Volume (vol) IEICE-115 
Number (no) no.215 
Page pp.15-19 
#Pages IEICE-5 
Date of Issue IEICE-ISEC-2015-08-28 

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