Paper Abstract and Keywords |
Presentation |
2015-08-25 09:30
[Invited Talk]
Low-Power Embedded ReRAM Technology for IoT Applications Makoto Ueki, Akira Tanabe, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi (Renesas Electronics) SDM2015-65 ICD2015-34 Link to ES Tech. Rep. Archives: SDM2015-65 ICD2015-34 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A low-power 2Mb ReRAM macro was developed in 90 nm CMOS platform, demonstrating lower power data-writing (x1/7-x1/10) and faster data-reading (x2-3) as compared to a conventional flash. The memory window at -6sigma for 10 years was confirmed with a high-speed 1-bit ECC considering operating temperature ranging from -40 to 85 degree C. A pulse-modulated Off-state verify and an interface-control of Ru electrode are effective for suppressing random fluctuation of Roff readout and for sustaining the On-state retention, respectively. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
ReRAM / embedded ReRAM / low-power / noise / Random telegraph noise (RTN) / / / |
Reference Info. |
IEICE Tech. Rep., vol. 115, no. 191, ICD2015-34, pp. 41-46, Aug. 2015. |
Paper # |
ICD2015-34 |
Date of Issue |
2015-08-17 (SDM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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SDM2015-65 ICD2015-34 Link to ES Tech. Rep. Archives: SDM2015-65 ICD2015-34 |
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