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Paper Abstract and Keywords
Presentation 2015-07-06 13:00
A programmable power supply array utilizing one chip POL
Madoka Higashida, Takayuki Yamamoto, Seiya Abe, Satoshi Matsumoto (KIT) EE2015-6
Abstract (in Japanese) (See Japanese page) 
(in English) We propose a full digital control strategy for multiple input and output voltages POLs based on power SoC. We also report the experimental results of the proposed strategy. The results show that the proposed strategy enables to supply multiple output voltages using boost and back modes at the same time by applying a plurality of input voltages and improves the efficiency over the wide range. In addition, the proposed strategy can supply multiple voltages by only entering the 4 parameters of FPGA or DSP.
Keyword (in Japanese) (See Japanese page) 
(in English) DC-DC Converter / Digital Control / Low Power / Multiple Input and Output / High Frequency / Miniaturization / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 128, EE2015-6, pp. 1-6, July 2015.
Paper # EE2015-6 
Date of Issue 2015-06-29 (EE) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EE2015-6

Conference Information
Committee EE WPT IEE-SPC  
Conference Date 2015-07-06 - 2015-07-07 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EE 
Conference Code 2015-07-EE-WPT-SPC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A programmable power supply array utilizing one chip POL 
Sub Title (in English)  
Keyword(1) DC-DC Converter  
Keyword(2) Digital Control  
Keyword(3) Low Power  
Keyword(4) Multiple Input and Output  
Keyword(5) High Frequency  
Keyword(6) Miniaturization  
1st Author's Name Madoka Higashida  
1st Author's Affiliation Kyushu Institute of Technology (KIT)
2nd Author's Name Takayuki Yamamoto  
2nd Author's Affiliation Kyushu Institute of Technology (KIT)
3rd Author's Name Seiya Abe  
3rd Author's Affiliation Kyushu Institute of Technology (KIT)
4th Author's Name Satoshi Matsumoto  
4th Author's Affiliation Kyushu Institute of Technology (KIT)
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Date Time 2015-07-06 13:00:00 
Presentation Time 30 
Registration for EE 
Paper # IEICE-EE2015-6 
Volume (vol) IEICE-115 
Number (no) no.128 
Page pp.1-6 
#Pages IEICE-6 
Date of Issue IEICE-EE-2015-06-29 

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