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Paper Abstract and Keywords
Presentation 2015-04-17 13:30
[Invited Lecture] A 2.4 pJ Ferroelectric-Based Non-Volatile Flip-Flop with 10-Year Data Retention Capability
Hiromitsu Kimura, Takaaki Fuchikami, Kyoji Marumoto, Yoshikazu Fujimori (ROHM), Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2015-11 Link to ES Tech. Rep. Archives: ICD2015-11
Abstract (in Japanese) (See Japanese page) 
(in English) A ferroelectric-based (FE-based) non-volatile flip-flop (NVFF) is proposed for low-power LSI.
Since leakage current in a logic circuit can be cut off by non-volatile storage capability of NVFFs, the standby power is reduced to zero.
The use of complementarily stored data in coupled ferroelectric capacitors makes it possible to achieve 88$%$ reduction of ferroelectric capacitor size while maintaining a wide read voltage margin of 240mV (minimum) at 1.5V, which results in 2.4pJ low access energy with 10-year, 85$^circ$C data retention capability.
An access speed of the ferroelectric capacitor can be adaptively changed according to required retention time, which becomes 1.6$mu$s for 10-year data retention, and 170ns for 10-hour data retention.
Especially, short-term data retention is suitable for power gating implementation.
Applying the proposed circuitry in 32bit CPU of a vital sensor LSI, its power consumption becomes 13$%$ of that of conventional one with area overhead of 64$%$ using 130nm CMOS with Pb(Zr,Ti)O$_3$(PZT) thin films.
Keyword (in Japanese) (See Japanese page) 
(in English) Non-volatile logic / Non-volatile flip-flop / Ferroelectric capacitor / Low power / Microporcessor / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 6, ICD2015-11, pp. 51-55, April 2015.
Paper # ICD2015-11 
Date of Issue 2015-04-09 (ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2015-11 Link to ES Tech. Rep. Archives: ICD2015-11

Conference Information
Committee ICD  
Conference Date 2015-04-16 - 2015-04-17 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2015-04-ICD 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 2.4 pJ Ferroelectric-Based Non-Volatile Flip-Flop with 10-Year Data Retention Capability 
Sub Title (in English)  
Keyword(1) Non-volatile logic  
Keyword(2) Non-volatile flip-flop  
Keyword(3) Ferroelectric capacitor  
Keyword(4) Low power  
Keyword(5) Microporcessor  
1st Author's Name Hiromitsu Kimura  
1st Author's Affiliation ROHM Co.,Ltd. (ROHM)
2nd Author's Name Takaaki Fuchikami  
2nd Author's Affiliation ROHM Co.,Ltd. (ROHM)
3rd Author's Name Kyoji Marumoto  
3rd Author's Affiliation ROHM Co.,Ltd. (ROHM)
4th Author's Name Yoshikazu Fujimori  
4th Author's Affiliation ROHM Co.,Ltd. (ROHM)
5th Author's Name Shintaro Izumi  
5th Author's Affiliation Kobe University (Kobe Univ.)
6th Author's Name Hiroshi Kawaguchi  
6th Author's Affiliation Kobe University (Kobe Univ.)
7th Author's Name Masahiko Yoshimoto  
7th Author's Affiliation Kobe University (Kobe Univ.)
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Date Time 2015-04-17 13:30:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-ICD2015-11 
Volume (vol) IEICE-115 
Number (no) no.6 
Page pp.51-55 
#Pages IEICE-5 
Date of Issue IEICE-ICD-2015-04-09 

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