Paper Abstract and Keywords |
Presentation |
2015-04-16 16:05
[Invited Lecture]
A Low-Power 64Gb MLC NAND-Flash Memory in 15nm CMOS Technology Mario Sako, Takao Nakajima, Junpei Sato, Kazuyoshi Muraoka, Masaki Fujiu, Fumihiro Kono, Michio Nakagawa, Masami Masuda, Koji Kato, Yuri Terada, Yuki Shimizu, Mitsuaki Honma, Yoshinao Suzuki, Yoshihisa Watanabe (Toshiba), Ryuji Yamashita (SanDisk) ICD2015-6 Link to ES Tech. Rep. Archives: ICD2015-6 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A 75mm2 low power 64Gb MLC NAND flash memory capable of 30MB/s program throughput and 533MB/s data transfer rate at 1.8V supply voltage is developed in 15nm CMOS technology. 36% power reduction from 3.3V design is achieved by a new pumping scheme. New low current peak features reduce a multi-die concurrent programming peak by 65% for 4-die case, and an erase verifying peak by 40%, respectively. Nano-scale transistors reducing bitline discharge time by 70% is introduced to improve performance. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
NAND / Flash / memory / MLC / Low power / / / |
Reference Info. |
IEICE Tech. Rep., vol. 115, no. 6, ICD2015-6, pp. 27-30, April 2015. |
Paper # |
ICD2015-6 |
Date of Issue |
2015-04-09 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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ICD2015-6 Link to ES Tech. Rep. Archives: ICD2015-6 |
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