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Paper Abstract and Keywords
Presentation 2015-03-07 13:25
Design and Evaluation of a Floating-point Multiplier with Online Error Detection by Partial Duplication
Nobutaka Kito (Chukyo Univ.), Kazushi Akimoto, Naofumi Takagi (Kyoto Univ.) CPSY2014-181 DC2014-107
Abstract (in Japanese) (See Japanese page) 
(in English) A floating-point multiplier with reduced precision error detection is proposed.
It uses a truncated multiplier for checking of mantissa multiplication instead of duplication.
The truncated multiplier in it is designed considering rounding in floating-point operation, and
it can detect any erroneous value with error larger than one unit in the last place (ulp).
The circuit area of it is smaller than that of duplicated one.
Hardware overhead of a single-precision multiplier is about 75% and that of a double-precision one is about 65%.
Keyword (in Japanese) (See Japanese page) 
(in English) online error detection / floating-point multiplier / duplication / truncated multiplier / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 507, DC2014-107, pp. 125-130, March 2015.
Paper # DC2014-107 
Date of Issue 2015-02-27 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2014-181 DC2014-107

Conference Information
Committee CPSY IPSJ-EMB IPSJ-SLDM DC  
Conference Date 2015-03-06 - 2015-03-07 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To DC 
Conference Code 2015-03-CPSY-EMB-SLDM-DC 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design and Evaluation of a Floating-point Multiplier with Online Error Detection by Partial Duplication 
Sub Title (in English)  
Keyword(1) online error detection  
Keyword(2) floating-point multiplier  
Keyword(3) duplication  
Keyword(4) truncated multiplier  
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1st Author's Name Nobutaka Kito  
1st Author's Affiliation Chukyo University (Chukyo Univ.)
2nd Author's Name Kazushi Akimoto  
2nd Author's Affiliation Kyoto University (Kyoto Univ.)
3rd Author's Name Naofumi Takagi  
3rd Author's Affiliation Kyoto University (Kyoto Univ.)
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Speaker
Date Time 2015-03-07 13:25:00 
Presentation Time 25 
Registration for DC 
Paper # IEICE-CPSY2014-181,IEICE-DC2014-107 
Volume (vol) IEICE-114 
Number (no) no.506(CPSY), no.507(DC) 
Page pp.125-130 
#Pages IEICE-6 
Date of Issue IEICE-CPSY-2015-02-27,IEICE-DC-2015-02-27 


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