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Paper Abstract and Keywords
Presentation 2015-03-05 11:50
Hardware implementation of embedded systems using the TCP/IP communication
Atsushi Nakanishi, Kouki Uchikoshi, Kei Igarashi, Tomoaki Kimura (KAIT) SIS2014-96
Abstract (in Japanese) (See Japanese page) 
(in English) We proposed an embedded system which is TCP/IP communication of CPU-LESS by using FPGA. This system is based on TCP/IP standard. In case of conventional embedded system, standard TCP/IP protocol generate a packet data by using CPU, thus, this system needs CPU’s process. Therefore, TCP/IP’s transfer speed of the conventional system is not stable. In this paper, we report about development of the 100BASE’s TCP/IP protocol stack system of CPU-LESS and an embedded system, these systems are implemented to FPGA. And, it is shown that it is better than the conventional system about this TCP/IP system.
Keyword (in Japanese) (See Japanese page) 
(in English) TCP/IP / Embedded Systems / FPGA / / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 496, SIS2014-96, pp. 27-32, March 2015.
Paper # SIS2014-96 
Date of Issue 2015-02-26 (SIS) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SIS  
Conference Date 2015-03-05 - 2015-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English) Meiji Univ. Nakano Campus (Tokyo) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Soft Computing, etc. 
Paper Information
Registration To SIS 
Conference Code 2015-03-SIS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Hardware implementation of embedded systems using the TCP/IP communication 
Sub Title (in English)  
Keyword(1) TCP/IP  
Keyword(2) Embedded Systems  
Keyword(3) FPGA  
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1st Author's Name Atsushi Nakanishi  
1st Author's Affiliation Kanagawa Institute of Technology (KAIT)
2nd Author's Name Kouki Uchikoshi  
2nd Author's Affiliation Kanagawa Institute of Technology (KAIT)
3rd Author's Name Kei Igarashi  
3rd Author's Affiliation Kanagawa Institute of Technology (KAIT)
4th Author's Name Tomoaki Kimura  
4th Author's Affiliation Kanagawa Institute of Technology (KAIT)
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Speaker
Date Time 2015-03-05 11:50:00 
Presentation Time 20 
Registration for SIS 
Paper # IEICE-SIS2014-96 
Volume (vol) IEICE-114 
Number (no) no.496 
Page pp.27-32 
#Pages IEICE-6 
Date of Issue IEICE-SIS-2015-02-26 


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