Paper Abstract and Keywords |
Presentation |
2015-03-03 13:15
[Invited Talk]
Fast and Secure Implementation of Cryptography and its Practical Application Shinichi Kawamura (Toshiba) IT2014-99 ISEC2014-112 WBS2014-91 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
The author will talk about his past research on implementation of cryptography. For the practical use of cryptography, it must be as fast as possible under a given condition and spaces. Since public-key cryptography usually requires 1000 times as many steps as symmetric key cryptography for its processing, it has been and still is one of the crucial issues to develop fast and compact implementation. In Part 1 of this talk, to improve the processing speed of RSA cryptosystem, three approaches are explained: (1) Server-aided computation, (2) Crypto co-processor, and (3) Parallel processing with RNS (Residue Number System). In addition to being fast and compact, security of implementation has been a fundamental requirement for cryptographic module since the discovery of implementation attacks such as side-channel attack and fault-based attack. Attackers make use of side-channel information and faulty result which are not necessarily considered when cryptographic algorithms are designed. Part 2 of this talk deals with such attacks and countermeasures. Standard evaluation board, the concept and first instance of which were proposed by a Japanese committee, has been playing an important role to facilitate the development of countermeasures against implementation attacks. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Cryptography / RSA / implementation / fast computation / side-channel attack / countermeasure / standard evaluation board / |
Reference Info. |
IEICE Tech. Rep., vol. 114, no. 471, ISEC2014-112, pp. 231-238, March 2015. |
Paper # |
ISEC2014-112 |
Date of Issue |
2015-02-23 (IT, ISEC, WBS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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IT2014-99 ISEC2014-112 WBS2014-91 |
Conference Information |
Committee |
ISEC IT WBS |
Conference Date |
2015-03-02 - 2015-03-03 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
The University of Kitakyushu |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
joint meeting of IT, ISEC, and WBS |
Paper Information |
Registration To |
ISEC |
Conference Code |
2015-03-ISEC-IT-WBS |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Fast and Secure Implementation of Cryptography and its Practical Application |
Sub Title (in English) |
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Cryptography |
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RSA |
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implementation |
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fast computation |
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side-channel attack |
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countermeasure |
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standard evaluation board |
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1st Author's Name |
Shinichi Kawamura |
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Toshiba Corporation (Toshiba) |
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Speaker |
Author-1 |
Date Time |
2015-03-03 13:15:00 |
Presentation Time |
50 minutes |
Registration for |
ISEC |
Paper # |
IT2014-99, ISEC2014-112, WBS2014-91 |
Volume (vol) |
vol.114 |
Number (no) |
no.470(IT), no.471(ISEC), no.472(WBS) |
Page |
pp.231-238 |
#Pages |
8 |
Date of Issue |
2015-02-23 (IT, ISEC, WBS) |
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