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| Presentation | 2015-01-30 16:30 A Low Latency Real-Time Execution on Dependable Responsive Multithreaded Processor Keigo Mizotani, Yusuke Hatori, Yusuke Kumura, Masayoshi Takasu, Hiroyuki Chishiro, Nobuyuki Yamasaki (Keio Univ.)  VLD2014-149 CPSY2014-158 RECONF2014-82 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In recent embedded real-time systems, there are many systems with both hard real-time tasks and soft real-time tasks. While a soft real-time task has a low priority and its throughput is important, a hard real-time task has a high priority and is executed in a short period. In this paper, we propose a low latency real-time execution mechanism which separates a hard real-time task with a high priority from the real-time scheduler and executes that task in a shorter period. We implement this mechanism by use of Dependable Responsive Multithreaded Processor. At the same time, low priority tasks are scheduled by the real-time scheduler, and hence the entire throughput is maintained. In our experimental evaluation, the low latency real-time execution mechanism executes a task in the period of 50 μs, and hence we show that its overhead and jitter are enough small. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Embedded Real-Time System / Real-Time Scheduling / Simultaneous Multithreading / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 114, no. 427, CPSY2014-158, pp. 227-232, Jan. 2015. | |
| Paper # | CPSY2014-158 | |
| Date of Issue | 2015-01-22 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2014-149 CPSY2014-158 RECONF2014-82 |
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| Conference Information | |
| Committee | RECONF CPSY VLD IPSJ-SLDM |
| Conference Date | 2015-01-29 - 2015-01-30 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Paper Information | |
| Registration To | CPSY |
| Conference Code | 2015-01-RECONF-CPSY-VLD-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Low Latency Real-Time Execution on Dependable Responsive Multithreaded Processor |
| Sub Title (in English) | |
| Keyword(1) | Embedded Real-Time System |
| Keyword(2) | Real-Time Scheduling |
| Keyword(3) | Simultaneous Multithreading |
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| 1st Author's Name | Keigo Mizotani |
| 1st Author's Affiliation | Keio University (Keio Univ.) |
| 2nd Author's Name | Yusuke Hatori |
| 2nd Author's Affiliation | Keio University (Keio Univ.) |
| 3rd Author's Name | Yusuke Kumura |
| 3rd Author's Affiliation | Keio University (Keio Univ.) |
| 4th Author's Name | Masayoshi Takasu |
| 4th Author's Affiliation | Keio University (Keio Univ.) |
| 5th Author's Name | Hiroyuki Chishiro |
| 5th Author's Affiliation | Keio University (Keio Univ.) |
| 6th Author's Name | Nobuyuki Yamasaki |
| 6th Author's Affiliation | Keio University (Keio Univ.) |
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| Speaker | Author-1 |
| Date Time | 2015-01-30 16:30:00 |
| Presentation Time | 20 minutes |
| Registration for | CPSY |
| Paper # | VLD2014-149, CPSY2014-158, RECONF2014-82 |
| Volume (vol) | vol.114 |
| Number (no) | no.426(VLD), no.427(CPSY), no.428(RECONF) |
| Page | pp.227-232 |
| #Pages | 6 |
| Date of Issue | 2015-01-22 (VLD, CPSY, RECONF) |
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