| IEICE Technical Committee Submission System Conference Paper's Information |
Online Proceedings [Sign in] Tech. Rep. Archives |
| Go Top Page | Go Previous | [Japanese] / [English] |
| Paper Abstract and Keywords | ||
| Presentation | 2015-01-29 16:05 FPGA Implementation of a High Time Resolution Signal Generation Circuit for PWM Shun Kashiwagi, Daiki Mitsutake, Hironobu Taniguchi, Yuichiro Shibata, Kiyoshi Oguri, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.)  VLD2014-125 CPSY2014-134 RECONF2014-58 |
|
| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Recently, high-frequency digitally controlled switching power supplies have received increasing attention in the context of energy saving for electronic equipments. Digitally controlled switching power supplies using FPGAs can perform real-time effective control for voltage changes, by making the best use of high-speed parallel arithmetic circuits. On the other hand, one of the challenges for high-frequency control is to improve time resolution of PWM control while alleviating FPGA resource utilization. This paper shows a novel PWM signal generation circuit with an SerDes primitive for parallel-serial conversion and an ODELAYE2 primitive for fine grained adjustment of a delay quantity. Empirical evaluation results reveal that the proposed circuit can control the duration of the PWM signal in units of approximately 0.08ns and achieves preferable linearity of the delay. The required hardware amount is also small: 37 slices, 63 flip-flops, and 98 LUTs are utilized, respectively. |
|
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / Switching Power Supply / PWM Control / odelay / SerDes / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 114, no. 428, RECONF2014-58, pp. 85-90, Jan. 2015. | |
| Paper # | RECONF2014-58 | |
| Date of Issue | 2015-01-22 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2014-125 CPSY2014-134 RECONF2014-58 |
|
| Conference Information | |
| Committee | RECONF CPSY VLD IPSJ-SLDM |
| Conference Date | 2015-01-29 - 2015-01-30 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2015-01-RECONF-CPSY-VLD-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | FPGA Implementation of a High Time Resolution Signal Generation Circuit for PWM |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Switching Power Supply |
| Keyword(3) | PWM Control |
| Keyword(4) | odelay |
| Keyword(5) | SerDes |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Shun Kashiwagi |
| 1st Author's Affiliation | Nagasaki University (Nagasaki Univ.) |
| 2nd Author's Name | Daiki Mitsutake |
| 2nd Author's Affiliation | Nagasaki University (Nagasaki Univ.) |
| 3rd Author's Name | Hironobu Taniguchi |
| 3rd Author's Affiliation | Nagasaki University (Nagasaki Univ.) |
| 4th Author's Name | Yuichiro Shibata |
| 4th Author's Affiliation | Nagasaki University (Nagasaki Univ.) |
| 5th Author's Name | Kiyoshi Oguri |
| 5th Author's Affiliation | Nagasaki University (Nagasaki Univ.) |
| 6th Author's Name | Hidenori Maruta |
| 6th Author's Affiliation | Nagasaki University (Nagasaki Univ.) |
| 7th Author's Name | Fujio Kurokawa |
| 7th Author's Affiliation | Nagasaki University (Nagasaki Univ.) |
| 8th Author's Name | |
| 8th Author's Affiliation | () |
| 9th Author's Name | |
| 9th Author's Affiliation | () |
| 10th Author's Name | |
| 10th Author's Affiliation | () |
| 11th Author's Name | |
| 11th Author's Affiliation | () |
| 12th Author's Name | |
| 12th Author's Affiliation | () |
| 13th Author's Name | |
| 13th Author's Affiliation | () |
| 14th Author's Name | |
| 14th Author's Affiliation | () |
| 15th Author's Name | |
| 15th Author's Affiliation | () |
| 16th Author's Name | |
| 16th Author's Affiliation | () |
| 17th Author's Name | |
| 17th Author's Affiliation | () |
| 18th Author's Name | |
| 18th Author's Affiliation | () |
| Speaker | Author-1 |
| Date Time | 2015-01-29 16:05:00 |
| Presentation Time | 20 minutes |
| Registration for | RECONF |
| Paper # | VLD2014-125, CPSY2014-134, RECONF2014-58 |
| Volume (vol) | vol.114 |
| Number (no) | no.426(VLD), no.427(CPSY), no.428(RECONF) |
| Page | pp.85-90 |
| #Pages | 6 |
| Date of Issue | 2015-01-22 (VLD, CPSY, RECONF) |
[Return to Top Page]