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Paper Abstract and Keywords
Presentation 2015-01-27 15:55
[Invited Talk] 16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM Macros with Wordline Overdriven Assist
Makoto Yabuuchi, Masao Morimoto, Yasumasa Tsukamoto, Shinji Tanaka, Koji Tanaka, Miki Tanaka, Koji Nii (Renesas) SDM2014-144 Link to ES Tech. Rep. Archives: SDM2014-144
Abstract (in Japanese) (See Japanese page) 
(in English) We demonstrate 16 nm FinFET High-k/Metal-gate SRAM macros with a wordline (WL) overdriven read/write-assist circuit. Test-chip measurements confirm improved minimum operating voltage (Vmin), standby leakage current, and access time compared to planar bulk CMOS. The proposed assist circuit improves Vmin by 50 mV and improves read-access-time by more than 1.5 times in 256-kbit SRAM macros. Read current (Iread) dependence against the fin diffusion length was observed. An extra design guard-band is needed to provide a reliable operation margin.
Keyword (in Japanese) (See Japanese page) 
(in English) SRAM / 16nm / FinFET / assist circuit / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 421, SDM2014-144, pp. 37-40, Jan. 2015.
Paper # SDM2014-144 
Date of Issue 2015-01-20 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2014-144 Link to ES Tech. Rep. Archives: SDM2014-144

Conference Information
Committee SDM  
Conference Date 2015-01-27 - 2015-01-27 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SDM 
Conference Code 2015-01-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM Macros with Wordline Overdriven Assist 
Sub Title (in English)  
Keyword(1) SRAM  
Keyword(2) 16nm  
Keyword(3) FinFET  
Keyword(4) assist circuit  
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1st Author's Name Makoto Yabuuchi  
1st Author's Affiliation Renesas Electronics Corporation (Renesas)
2nd Author's Name Masao Morimoto  
2nd Author's Affiliation Renesas Electronics Corporation (Renesas)
3rd Author's Name Yasumasa Tsukamoto  
3rd Author's Affiliation Renesas Electronics Corporation (Renesas)
4th Author's Name Shinji Tanaka  
4th Author's Affiliation Renesas Electronics Corporation (Renesas)
5th Author's Name Koji Tanaka  
5th Author's Affiliation Renesas Electronics Corporation (Renesas)
6th Author's Name Miki Tanaka  
6th Author's Affiliation Renesas Electronics Corporation (Renesas)
7th Author's Name Koji Nii  
7th Author's Affiliation Renesas Electronics Corporation (Renesas)
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Speaker Author-1 
Date Time 2015-01-27 15:55:00 
Presentation Time 25 minutes 
Registration for SDM 
Paper # SDM2014-144 
Volume (vol) vol.114 
Number (no) no.421 
Page pp.37-40 
#Pages
Date of Issue 2015-01-20 (SDM) 


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