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Paper Abstract and Keywords
Presentation 2014-12-22 15:00
Monte Carlo Simulation of InAlAs/InGaAs HEMTs with Various Shape of Buried Gate
Akira Endoh (NICT/Fujitsu Labs.), Issei Watanabe, Akifumi Kasamatsu (NICT), Takashi Mimura (Fujitsu Labs./NICT) ED2014-102 Link to ES Tech. Rep. Archives: ED2014-102
Abstract (in Japanese) (See Japanese page) 
(in English) To achieve higher-speed operations of InAlAs/InGaAs HEMTs, the gate-channel distance d as well as gate length Lg must be reduced to suppress the short-channel effects. The buried gate structures are one of the most effective methods to reduce the gate-channel distance d. There are mainly two methods to reduce d: one is the recessed-gate technology and another is the gate metal sinking process. In these techniques, the fabricated gate foot is not rectangular, i.e. the tip of the gate electrode is “round.” We carried out Monte Carlo (MC) simulation of In0.52Al0.48As/In0.53Ga0.47As high electron mobility transistors (HEMTs) with various shape of buried gate. Especially, we examined the HEMTs with a “realistic” buried gate in which the tip of the gate foot is “round.” We found that the “effective” gate length is determined by the length of gate foot tip from the electron velocity profiles and electric field in the channel layer. Furthermore, the “round” tip of gate electrode is convenient to prevent breakdown. The cutoff frequency fT increases with decreasing the “effective” gate length.
Keyword (in Japanese) (See Japanese page) 
(in English) HEMTs / Monte Carlo simulation / Buried gate / Electron velocity / Electric field / Short-channel effects / Effective gate length / Cutoff frequency  
Reference Info. IEICE Tech. Rep., vol. 114, no. 387, ED2014-102, pp. 21-26, Dec. 2014.
Paper # ED2014-102 
Date of Issue 2014-12-15 (ED) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ED2014-102 Link to ES Tech. Rep. Archives: ED2014-102

Conference Information
Committee ED  
Conference Date 2014-12-22 - 2014-12-23 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ED 
Conference Code 2014-12-ED 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Monte Carlo Simulation of InAlAs/InGaAs HEMTs with Various Shape of Buried Gate 
Sub Title (in English)  
Keyword(1) HEMTs  
Keyword(2) Monte Carlo simulation  
Keyword(3) Buried gate  
Keyword(4) Electron velocity  
Keyword(5) Electric field  
Keyword(6) Short-channel effects  
Keyword(7) Effective gate length  
Keyword(8) Cutoff frequency  
1st Author's Name Akira Endoh  
1st Author's Affiliation National Institute of Information and Communications Technology/Fujitsu Laboratories Ltd. (NICT/Fujitsu Labs.)
2nd Author's Name Issei Watanabe  
2nd Author's Affiliation National Institute of Information and Communications Technology (NICT)
3rd Author's Name Akifumi Kasamatsu  
3rd Author's Affiliation National Institute of Information and Communications Technology (NICT)
4th Author's Name Takashi Mimura  
4th Author's Affiliation Fujitsu Laboratories Ltd./National Institute of Information and Communications Technology (Fujitsu Labs./NICT)
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Speaker
Date Time 2014-12-22 15:00:00 
Presentation Time 25 
Registration for ED 
Paper # IEICE-ED2014-102 
Volume (vol) IEICE-114 
Number (no) no.387 
Page pp.21-26 
#Pages IEICE-6 
Date of Issue IEICE-ED-2014-12-15 


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