IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
... (for ESS/CS/ES/ISS)
Tech. Rep. Archives
... (for ES/CS)
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2014-11-27 16:25
Design and study of PUF Circuit using IO-Masked Dual-Rail ROM with Resistance against Side-Channel Attacks
Takashi Nishimura, Akihiro Takeuchi, Mitsuru Shiozaki, Takeshi Fujino (Ritsumeikan Univ.) CPM2014-125 ICD2014-68 Link to ES Tech. Rep. Archives: CPM2014-125 ICD2014-68
Abstract (in Japanese) (See Japanese page) 
(in English) Physical unclonable function (PUF) has been proposed as tamper-resistant technique to protect secure device. The PUF extracts inherent physical variation such as transistor size, threshold voltage etc. and creates unique IDs. In addition, tamper-resistant devices require protecting against side-channel attacks which reveal a secret key of a cryptographic circuit by measuring power consumption or electromagnetic radiation during the cryptographic operations. We proposed new PUF using MDR-ROM, which was proposed as a countermeasure against side-channel attacks, in order to achieve small circuit area. This paper presents the secure circuit combining AES with resistance against side-channel attacks with the MDR-ROM PUF. We presents also examination results of the MDR-ROM PUF.
Keyword (in Japanese) (See Japanese page) 
(in English) PUF / Side-Channel Attack / AES / MDR-ROM / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 333, ICD2014-68, pp. 15-20, Nov. 2014.
Paper # ICD2014-68 
Date of Issue 2014-11-20 (CPM, ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPM2014-125 ICD2014-68 Link to ES Tech. Rep. Archives: CPM2014-125 ICD2014-68

Conference Information
Conference Date 2014-11-26 - 2014-11-28 
Place (in Japanese) (See Japanese page) 
Place (in English) B-ConPlaza 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2014 -New Field of VLSI Design- 
Paper Information
Registration To ICD 
Conference Code 2014-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design and study of PUF Circuit using IO-Masked Dual-Rail ROM with Resistance against Side-Channel Attacks 
Sub Title (in English)  
Keyword(1) PUF  
Keyword(2) Side-Channel Attack  
Keyword(3) AES  
Keyword(4) MDR-ROM  
1st Author's Name Takashi Nishimura  
1st Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
2nd Author's Name Akihiro Takeuchi  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
3rd Author's Name Mitsuru Shiozaki  
3rd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
4th Author's Name Takeshi Fujino  
4th Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Date Time 2014-11-27 16:25:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-CPM2014-125,IEICE-ICD2014-68 
Volume (vol) IEICE-114 
Number (no) no.332(CPM), no.333(ICD) 
Page pp.15-20 
#Pages IEICE-6 
Date of Issue IEICE-CPM-2014-11-20,IEICE-ICD-2014-11-20 

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan