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Paper Abstract and Keywords
Presentation 2014-11-26 15:35
An efficient calculation of RTN-induced SRAM failure probability
Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato (Kyoto Univ.) VLD2014-74 DC2014-28
Abstract (in Japanese) (See Japanese page) 
(in English) Failure rate degradation of an SRAM cell due to random telegraph noise (RTN) is calculated for the first time. An efficient calculation method of RTN-induced SRAM failure probability has been developed to exhaustively
cover a large number of possible bias-voltage combinations on which RTN statistics strongly depend. In order to shorten computational time, the Monte Carlo calculation of a single gate-bias condition is accelerated by incorporating two techniques: 1) construction of an optimal importance sampling using particles that move about the ``important'' regions in a variability space, and 2) a classifier that quickly judges whether the random samples are in failure regions or not. We show that the proposed method achieves at least $15.6times$ speed-up over the state-of-the-art method. We then integrate an RTN model to modulate failure probability. In our experiment, RTN worsens failure probability by six times than that calculated without the effect of RTN.
Keyword (in Japanese) (See Japanese page) 
(in English) random telegraph noise / SRAM / failure probability / importance sampling / Monte Carlo method / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 328, VLD2014-74, pp. 15-20, Nov. 2014.
Paper # VLD2014-74 
Date of Issue 2014-11-19 (VLD, DC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2014-74 DC2014-28

Conference Information
Conference Date 2014-11-26 - 2014-11-28 
Place (in Japanese) (See Japanese page) 
Place (in English) B-ConPlaza 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2014 -New Field of VLSI Design- 
Paper Information
Registration To VLD 
Conference Code 2014-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An efficient calculation of RTN-induced SRAM failure probability 
Sub Title (in English)  
Keyword(1) random telegraph noise  
Keyword(2) SRAM  
Keyword(3) failure probability  
Keyword(4) importance sampling  
Keyword(5) Monte Carlo method  
1st Author's Name Hiromitsu Awano  
1st Author's Affiliation Kyoto University (Kyoto Univ.)
2nd Author's Name Masayuki Hiromoto  
2nd Author's Affiliation Kyoto University (Kyoto Univ.)
3rd Author's Name Takashi Sato  
3rd Author's Affiliation Kyoto University (Kyoto Univ.)
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Date Time 2014-11-26 15:35:00 
Presentation Time 25 
Registration for VLD 
Paper # IEICE-VLD2014-74,IEICE-DC2014-28 
Volume (vol) IEICE-114 
Number (no) no.328(VLD), no.329(DC) 
Page pp.15-20 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2014-11-19,IEICE-DC-2014-11-19 

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