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Paper Abstract and Keywords
Presentation 2014-08-22 14:25
Opto-electronic hybrid integrated chip packaging technology for silicon photonic platform using gold-stud bump bonding
Mitsuo Usui, Kotaro Takeda, Hirooki Hirata, Hiroshi Fukuda, Tai Tsuchizawa, Hidetaka Nishi, Rai Kou, Tatsuro Hiraki, Kentaro Honda, Masafumi Nogawa, Koji Yamada, Tsuyoshi Yamamoto (NTT) R2014-45 EMD2014-50 CPM2014-65 OPE2014-75 LQE2014-49 Link to ES Tech. Rep. Archives: EMD2014-50 CPM2014-65 OPE2014-75 LQE2014-49
Abstract (in Japanese) (See Japanese page) 
(in English) We propose a new solder-free and low-temperature (200 ℃ or less) flip-chip integration technology for silicon photonic platforms. Gold (Au) stud bumps are arranged facing each other on a substrate and a chip. Plastic deformation when the bumps are heated and pressed achieves Au-Au bonding. We measured mechanical and electrical characteristics (bond strength, electrical resistance, and high-frequency characteristics) of test samples fabricated by using this technology and confirmed good performance. The bonding strength exceeds the strength requirement of MIL-STD-883J, Method 2019. The electrical resistance at the bump connection is 2.3 m/bump, which is low enough. The frequency response (S21) is flat and return loss (S11) is larger than 20 dB in the frequency range of up to 40 GHz. Further, we fabricated a 4-ch-WDM receiver using this technology and confirmed that it has good performance at 25-Gbit/s operation.
Keyword (in Japanese) (See Japanese page) 
(in English) Si photonics / flip-chip bonding / gold (Au) stud bump / Au-Au bonding / plastic deformation / packaging technology / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 186, OPE2014-75, pp. 109-114, Aug. 2014.
Paper # OPE2014-75 
Date of Issue 2014-08-14 (R, EMD, CPM, OPE, LQE) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF R2014-45 EMD2014-50 CPM2014-65 OPE2014-75 LQE2014-49 Link to ES Tech. Rep. Archives: EMD2014-50 CPM2014-65 OPE2014-75 LQE2014-49

Conference Information
Committee EMD LQE OPE CPM R  
Conference Date 2014-08-21 - 2014-08-22 
Place (in Japanese) (See Japanese page) 
Place (in English) Otaru Economy Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To OPE 
Conference Code 2014-08-EMD-LQE-OPE-CPM-R 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Opto-electronic hybrid integrated chip packaging technology for silicon photonic platform using gold-stud bump bonding 
Sub Title (in English)  
Keyword(1) Si photonics  
Keyword(2) flip-chip bonding  
Keyword(3) gold (Au) stud bump  
Keyword(4) Au-Au bonding  
Keyword(5) plastic deformation  
Keyword(6) packaging technology  
Keyword(7)  
Keyword(8)  
1st Author's Name Mitsuo Usui  
1st Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
2nd Author's Name Kotaro Takeda  
2nd Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
3rd Author's Name Hirooki Hirata  
3rd Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
4th Author's Name Hiroshi Fukuda  
4th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
5th Author's Name Tai Tsuchizawa  
5th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
6th Author's Name Hidetaka Nishi  
6th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
7th Author's Name Rai Kou  
7th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
8th Author's Name Tatsuro Hiraki  
8th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
9th Author's Name Kentaro Honda  
9th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
10th Author's Name Masafumi Nogawa  
10th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
11th Author's Name Koji Yamada  
11th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
12th Author's Name Tsuyoshi Yamamoto  
12th Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
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Speaker
Date Time 2014-08-22 14:25:00 
Presentation Time 20 
Registration for OPE 
Paper # IEICE-R2014-45,IEICE-EMD2014-50,IEICE-CPM2014-65,IEICE-OPE2014-75,IEICE-LQE2014-49 
Volume (vol) IEICE-114 
Number (no) no.183(R), no.184(EMD), no.185(CPM), no.186(OPE), no.187(LQE) 
Page pp.109-114 
#Pages IEICE-6 
Date of Issue IEICE-R-2014-08-14,IEICE-EMD-2014-08-14,IEICE-CPM-2014-08-14,IEICE-OPE-2014-08-14,IEICE-LQE-2014-08-14 


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