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Paper Abstract and Keywords
Presentation 2014-08-05 16:10
Area-Efficient and Low-Power SAR ADC with Dynamic Comparator Threshold Configuring by Source Voltage Shifting
Masaki Yonekura, Kentaro Yoshioka, Hiroki Ishikuro (Keio Univ) Link to ES Tech. Rep. Archives: SDM2014-82 ICD2014-51
Abstract (in Japanese) (See Japanese page) 
(in English) An extremely low power and area efficient threshold configuring ADC (TC-ADC) is proposed. The threshold configuring comparator (TCC) performs a binary search and only 1b-DAC is required. 5b conversion is carried out by TCC with source voltage shifting technique. Additional 2b resolution is achieved by the proposed threshold interpolation (TI) technique with only 15% power overhead. Prototype ADC in 40nm CMOS occupies a core area of only 0.0038mm2 and when calibration circuit included, 0.0058 mm2. With a supply voltage of 0.7V, the ADC achieves 7.0 ENOB with 24MS/s. Peak FoM of 9.8fJ/conv. is obtained at 0.5V supply, which is over 15x improvement compared with conventional TC-ADC.
Keyword (in Japanese) (See Japanese page) 
(in English) Successive Approximation ADC / Threshold Configuring / Source Voltage Shifting / / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 175, ICD2014-51, pp. 109-113, Aug. 2014.
Paper # ICD2014-51 
Date of Issue 2014-07-28 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Conference Information
Committee ICD SDM  
Conference Date 2014-08-04 - 2014-08-05 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokkaido Univ., Multimedia Education Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2014-08-ICD-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Area-Efficient and Low-Power SAR ADC with Dynamic Comparator Threshold Configuring by Source Voltage Shifting 
Sub Title (in English)  
Keyword(1) Successive Approximation ADC  
Keyword(2) Threshold Configuring  
Keyword(3) Source Voltage Shifting  
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1st Author's Name Masaki Yonekura  
1st Author's Affiliation Keio University (Keio Univ)
2nd Author's Name Kentaro Yoshioka  
2nd Author's Affiliation Keio University (Keio Univ)
3rd Author's Name Hiroki Ishikuro  
3rd Author's Affiliation Keio University (Keio Univ)
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Speaker
Date Time 2014-08-05 16:10:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-SDM2014-82,IEICE-ICD2014-51 
Volume (vol) IEICE-114 
Number (no) no.174(SDM), no.175(ICD) 
Page pp.109-113 
#Pages IEICE-5 
Date of Issue IEICE-SDM-2014-07-28,IEICE-ICD-2014-07-28 


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