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Paper Abstract and Keywords
Presentation 2014-08-04 13:55
[Invited Talk] STT-MRAM Development for Embedded Cache Memory
Toshihiro Sugii, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Koji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsushi Takahashi, Chikako Yoshida (LEAP) Link to ES Tech. Rep. Archives: SDM2014-68 ICD2014-37
Abstract (in Japanese) (See Japanese page) 
(in English) We report the current status of our development of spin-transfer torque magnetic RAMs (STT-MRAMs) and their integration with the back-end-of-line (BEOL) process to replace conventional embedded SRAM cache memories. In order to enhance CPU performance, it is very effective to increase cache memory capacity. If we can reduce the switching current, we can reduce MRAM cell size and increase memory capacity. To reduce the switching current, shrinking MTJ is effective. On the other hand, under the same lithography technology, the smaller the MTJ, the larger the variation in MTJ size. This paper describes the new process for fabricating smaller MTJs for high density RAMs without increasing MTJ size variation.
Keyword (in Japanese) (See Japanese page) 
(in English) Spin transfer torque / STT-MRAM / MTJ / Low power / Embedded / BEOL / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 174, SDM2014-68, pp. 35-38, Aug. 2014.
Paper # SDM2014-68 
Date of Issue 2014-07-28 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Conference Information
Committee ICD SDM  
Conference Date 2014-08-04 - 2014-08-05 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokkaido Univ., Multimedia Education Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SDM 
Conference Code 2014-08-ICD-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) STT-MRAM Development for Embedded Cache Memory 
Sub Title (in English)  
Keyword(1) Spin transfer torque  
Keyword(2) STT-MRAM  
Keyword(3) MTJ  
Keyword(4) Low power  
Keyword(5) Embedded  
Keyword(6) BEOL  
Keyword(7)  
Keyword(8)  
1st Author's Name Toshihiro Sugii  
1st Author's Affiliation Low-power Electronics Association & Project (LEAP)
2nd Author's Name Yoshihisa Iba  
2nd Author's Affiliation Low-power Electronics Association & Project (LEAP)
3rd Author's Name Masaki Aoki  
3rd Author's Affiliation Low-power Electronics Association & Project (LEAP)
4th Author's Name Hideyuki Noshiro  
4th Author's Affiliation Low-power Electronics Association & Project (LEAP)
5th Author's Name Koji Tsunoda  
5th Author's Affiliation Low-power Electronics Association & Project (LEAP)
6th Author's Name Akiyoshi Hatada  
6th Author's Affiliation Low-power Electronics Association & Project (LEAP)
7th Author's Name Masaaki Nakabayashi  
7th Author's Affiliation Low-power Electronics Association & Project (LEAP)
8th Author's Name Yuuichi Yamazaki  
8th Author's Affiliation Low-power Electronics Association & Project (LEAP)
9th Author's Name Atsushi Takahashi  
9th Author's Affiliation Low-power Electronics Association & Project (LEAP)
10th Author's Name Chikako Yoshida  
10th Author's Affiliation Low-power Electronics Association & Project (LEAP)
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Speaker
Date Time 2014-08-04 13:55:00 
Presentation Time 50 
Registration for SDM 
Paper # IEICE-SDM2014-68,IEICE-ICD2014-37 
Volume (vol) IEICE-114 
Number (no) no.174(SDM), no.175(ICD) 
Page pp.35-38 
#Pages IEICE-4 
Date of Issue IEICE-SDM-2014-07-28,IEICE-ICD-2014-07-28 


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