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Paper Abstract and Keywords
Presentation 2014-08-04 15:45
[Invited Talk] A 32-bit CPU with Zero Standby Power and 1.5-clock Backup/2.5-clock Restore Achieved by Utilizing a 180-nm Crystalline Oxide Semiconductor Transistor
Jun Koyama, Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Kazuaki Ohshima, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi (SEL), Masahiro Fujita (Univ. of Tokyo), Shunpei Yamazaki (SEL) Link to ES Tech. Rep. Archives: SDM2014-70 ICD2014-39
Abstract (in Japanese) (See Japanese page) 
(in English) A flip-flop achieving high-speed backup utilizing a Si transistor and long-term retention with zero standby power by means of a transistor of a crystalline oxide semiconductor, especially a c-axis aligned crystalline In-Ga-Zn oxide semiconductor, featuring extremely low off-state current is proposed. Using the flip-flop, a 32-bit processor has been fabricated with 350-nm Si CMOS/180-nm CAAC oxide semiconductor hybrid technology, and demonstrated data backup and power shutdown in 1.5 clock cycles (100 ns at 15 MHz) at a low power of 1.77 nJ, data recovery in 2.5 clock cycles (167 ns at 15 MHz), and data retention with zero standby power for at least a day. According to simulation results, data backup and power shutdown in 1.5 clock cycles, data recovery in 2.5 clock cycles, and long-term retention can also be achieved with 45-nm Si CMOS/180-nm CAAC oxide semiconductor hybrid technology as in a fabricated test chip.
Keyword (in Japanese) (See Japanese page) 
(in English) Crystalline Oxide Semiconductor / CAAC-IGZO / Power gating / Zero standby power / Two-step backup flip-flop / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 175, ICD2014-39, pp. 45-50, Aug. 2014.
Paper # ICD2014-39 
Date of Issue 2014-07-28 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Conference Information
Committee ICD SDM  
Conference Date 2014-08-04 - 2014-08-05 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokkaido Univ., Multimedia Education Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2014-08-ICD-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 32-bit CPU with Zero Standby Power and 1.5-clock Backup/2.5-clock Restore Achieved by Utilizing a 180-nm Crystalline Oxide Semiconductor Transistor 
Sub Title (in English)  
Keyword(1) Crystalline Oxide Semiconductor  
Keyword(2) CAAC-IGZO  
Keyword(3) Power gating  
Keyword(4) Zero standby power  
Keyword(5) Two-step backup flip-flop  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Jun Koyama  
1st Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
2nd Author's Name Atsuo Isobe  
2nd Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
3rd Author's Name Hikaru Tamura  
3rd Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
4th Author's Name Kiyoshi Kato  
4th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
5th Author's Name Takuro Ohmaru  
5th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
6th Author's Name Wataru Uesugi  
6th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
7th Author's Name Takahiko Ishizu  
7th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
8th Author's Name Kazuaki Ohshima  
8th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
9th Author's Name Yasutaka Suzuki  
9th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
10th Author's Name Naoaki Tsutsui  
10th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
11th Author's Name Tomoaki Atsumi  
11th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
12th Author's Name Yutaka Shionoiri  
12th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
13th Author's Name Yukio Maehashi  
13th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
14th Author's Name Masahiro Fujita  
14th Author's Affiliation The University of Tokyo (Univ. of Tokyo)
15th Author's Name Shunpei Yamazaki  
15th Author's Affiliation Semiconductor Energy Laboratory CO.,LTD. (SEL)
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17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
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Speaker
Date Time 2014-08-04 15:45:00 
Presentation Time 50 
Registration for ICD 
Paper # IEICE-SDM2014-70,IEICE-ICD2014-39 
Volume (vol) IEICE-114 
Number (no) no.174(SDM), no.175(ICD) 
Page pp.45-50 
#Pages IEICE-6 
Date of Issue IEICE-SDM-2014-07-28,IEICE-ICD-2014-07-28 


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