Paper Abstract and Keywords |
Presentation |
2014-07-30 09:25
Instruction Execution Method towards Error Reduction of Neural Network Processing Kazuma Koike, Shinya Takamaeda-Yamazaki, Jun Yao, Yasuhiko Nakashima (NAIST) CPSY2014-33 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Approximate Computing has attracted attention as a method for reducing power consumption in varies applications, such as machine learning and image processing.Approximate Computing architecture was proposed in preceding study which indicates that the more approximate instructions are increased,the more power consumption can be reduced.In this paper,we applied approximate computation to memory load address calculation that capable to increase amount of approximated instruction.Furthermore,we proposed a method of raising error tolerance by focusing on characteristic of Neural Network processing. As a result,we reduce number of precise instructions to 61%,and raise 5.4 times precise instruction’s contribution for error tolerance at most. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Approximate Computing / Neural Network / Reliability / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 114, no. 155, CPSY2014-33, pp. 137-142, July 2014. |
Paper # |
CPSY2014-33 |
Date of Issue |
2014-07-21 (CPSY) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CPSY2014-33 |
Conference Information |
Committee |
CPSY DC |
Conference Date |
2014-07-28 - 2014-07-30 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Toki Messe, Niigata |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Parallel, Distributed and Cooperative Processing |
Paper Information |
Registration To |
CPSY |
Conference Code |
2014-07-CPSY-DC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Instruction Execution Method towards Error Reduction of Neural Network Processing |
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Keyword(1) |
Approximate Computing |
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Neural Network |
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Reliability |
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1st Author's Name |
Kazuma Koike |
1st Author's Affiliation |
Nara Institute of Science and Technology (NAIST) |
2nd Author's Name |
Shinya Takamaeda-Yamazaki |
2nd Author's Affiliation |
Nara Institute of Science and Technology (NAIST) |
3rd Author's Name |
Jun Yao |
3rd Author's Affiliation |
Nara Institute of Science and Technology (NAIST) |
4th Author's Name |
Yasuhiko Nakashima |
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Nara Institute of Science and Technology (NAIST) |
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Speaker |
Author-1 |
Date Time |
2014-07-30 09:25:00 |
Presentation Time |
25 minutes |
Registration for |
CPSY |
Paper # |
CPSY2014-33 |
Volume (vol) |
vol.114 |
Number (no) |
no.155 |
Page |
pp.137-142 |
#Pages |
6 |
Date of Issue |
2014-07-21 (CPSY) |
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