Paper Abstract and Keywords |
Presentation |
2014-04-18 14:15
Low-Power and High-Speed Search Engine by Multi-dimensional TCAM Architecture with Parallel Pipelined Subdivided Structure Kenzo Okuda, Masami Nawa, Shingo Ata (Osaka City Univ.), Yuji Yano, Yasuto Kuroda (Renesas), Hisashi Iwamoto (REVSONIC), kazunari Inoue (Nara National College of Tec./Osaka Univ.), Ikuo Oka (Osaka City Univ.) IN2014-7 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
TCAM (Ternary Content Addressable Memory) is widely used for high speed searching applications on networking equipment. Unlike general RAMs, a TCAM consumes vast amounts of power, because it is designed to search its entire memory in a single cycle. As size of matching table grows continuously, it recently becomes serious. In this paper, we propose a novel TCAM-based hardware architecture, which solves potential restrictions of TCAM by enabling selective partial activate according to "don’t care bits." For the purpose of reducing power consumed by TCAMs, we subdivide a TCAM into multiple sub TCAMs in LSI stage and stop look-up on sub TCAMs that consist of don’t care bits. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Power saving / Search engine / Address lookup / ACL / TCAM / Partial / Partial activate / Router |
Reference Info. |
IEICE Tech. Rep., vol. 114, no. 7, IN2014-7, pp. 67-72, April 2014. |
Paper # |
IN2014-7 |
Date of Issue |
2014-04-10 (IN) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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IN2014-7 |
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