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Paper Abstract and Keywords
Presentation 2014-04-18 11:20
[Invited Lecture] A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit
Keiichi Kushida, Fumihiko Tachibana, Osamu Hirabayashi, Yasuhisa Takeyama, Atsushi Kawasumi, Azuma Suzuki, Yusuke Niki, Miyako Shizuno, Sinichi Sasaki, Tomoaki Yabe, Yasuo Unekawa (Toshiba) ICD2014-13 Link to ES Tech. Rep. Archives: ICD2014-13
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents a dual-power-supply SRAM that reduces active and stand-by power from room temperature (RT) to high temperature (HT) using a BL power calculator (BLPC) and a digitally controllable retention circuit (DCRC). A test-chip is fabricated in a 28nm CMOS technology with a 0.120μm2 6T-SRAM cell. With these schemes, active and standby power consumptions at 25°C are reduced by 27% and 85%, respectively.
Keyword (in Japanese) (See Japanese page) 
(in English) A Dual-power supply SRAM / Power reduction / Digital LDO / / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 13, ICD2014-13, pp. 65-70, April 2014.
Paper # ICD2014-13 
Date of Issue 2014-04-10 (ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2014-13 Link to ES Tech. Rep. Archives: ICD2014-13

Conference Information
Committee ICD  
Conference Date 2014-04-17 - 2014-04-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Memory Device Technologies 
Paper Information
Registration To ICD 
Conference Code 2014-04-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit 
Sub Title (in English)  
Keyword(1) A Dual-power supply SRAM  
Keyword(2) Power reduction  
Keyword(3) Digital LDO  
1st Author's Name Keiichi Kushida  
1st Author's Affiliation Toshiba Corporation (Toshiba)
2nd Author's Name Fumihiko Tachibana  
2nd Author's Affiliation Toshiba Corporation (Toshiba)
3rd Author's Name Osamu Hirabayashi  
3rd Author's Affiliation Toshiba Corporation (Toshiba)
4th Author's Name Yasuhisa Takeyama  
4th Author's Affiliation Toshiba Corporation (Toshiba)
5th Author's Name Atsushi Kawasumi  
5th Author's Affiliation Toshiba Corporation (Toshiba)
6th Author's Name Azuma Suzuki  
6th Author's Affiliation Toshiba Corporation (Toshiba)
7th Author's Name Yusuke Niki  
7th Author's Affiliation Toshiba Corporation (Toshiba)
8th Author's Name Miyako Shizuno  
8th Author's Affiliation Toshiba Corporation (Toshiba)
9th Author's Name Sinichi Sasaki  
9th Author's Affiliation Toshiba Corporation (Toshiba)
10th Author's Name Tomoaki Yabe  
10th Author's Affiliation Toshiba Corporation (Toshiba)
11th Author's Name Yasuo Unekawa  
11th Author's Affiliation Toshiba Corporation (Toshiba)
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Date Time 2014-04-18 11:20:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-ICD2014-13 
Volume (vol) IEICE-114 
Number (no) no.13 
Page pp.65-70 
#Pages IEICE-6 
Date of Issue IEICE-ICD-2014-04-10 

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