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| Presentation | 2014-01-29 14:40 [Invited Talk] Suppression of Die-to-Die Delay Variability of Silicon on Thin Buried Oxide (SOTB) CMOS Circuits by Balanced P/N Drivability Control with Back-Bias for Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Koichiro Ishibashi (Univ. of Electro- Comm.), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo), Yasuo Yamaguchi (LEAP)  SDM2013-143 Link to ES Tech. Rep. Archives: SDM2013-143 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation voltage (Vdd). In the ultralow-Vdd regime, however, the upsurging delay (τpd) variability is the most important challenge. This paper proposes the balanced n/p drivability control method for reducing the die-to-die delay variation by back bias applicable for various circuits. Excellent variability reduction by this balanced control is demonstrated at Vdd = 0.4 V. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | SOTB / SOI / back bias / ring oscillator / τpd / variability / ultra-low voltage / | |
| Reference Info. | IEICE Tech. Rep., vol. 113, no. 420, SDM2013-143, pp. 35-38, Jan. 2014. | |
| Paper # | SDM2013-143 | |
| Date of Issue | 2014-01-22 (SDM) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
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| Download PDF | SDM2013-143 Link to ES Tech. Rep. Archives: SDM2013-143 |
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| Conference Information | |
| Committee | SDM |
| Conference Date | 2014-01-29 - 2014-01-29 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | SDM |
| Conference Code | 2014-01-SDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Suppression of Die-to-Die Delay Variability of Silicon on Thin Buried Oxide (SOTB) CMOS Circuits by Balanced P/N Drivability Control with Back-Bias for Ultralow-Voltage (0.4 V) Operation |
| Sub Title (in English) | |
| Keyword(1) | SOTB |
| Keyword(2) | SOI |
| Keyword(3) | back bias |
| Keyword(4) | ring oscillator |
| Keyword(5) | τpd |
| Keyword(6) | variability |
| Keyword(7) | ultra-low voltage |
| Keyword(8) | |
| 1st Author's Name | Hideki Makiyama |
| 1st Author's Affiliation | Low-power Electronics Association & Project (LEAP) |
| 2nd Author's Name | Yoshiki Yamamoto |
| 2nd Author's Affiliation | Low-power Electronics Association & Project (LEAP) |
| 3rd Author's Name | Hirofumi Shinohara |
| 3rd Author's Affiliation | Low-power Electronics Association & Project (LEAP) |
| 4th Author's Name | Toshiaki Iwamatsu |
| 4th Author's Affiliation | Low-power Electronics Association & Project (LEAP) |
| 5th Author's Name | Hidekazu Oda |
| 5th Author's Affiliation | Low-power Electronics Association & Project (LEAP) |
| 6th Author's Name | Nobuyuki Sugii |
| 6th Author's Affiliation | Low-power Electronics Association & Project (LEAP) |
| 7th Author's Name | Koichiro Ishibashi |
| 7th Author's Affiliation | The University of Electro- Communications (Univ. of Electro- Comm.) |
| 8th Author's Name | Tomoko Mizutani |
| 8th Author's Affiliation | The Univ. of Tokyo (Univ. of Tokyo) |
| 9th Author's Name | Toshiro Hiramoto |
| 9th Author's Affiliation | The Univ. of Tokyo (Univ. of Tokyo) |
| 10th Author's Name | Yasuo Yamaguchi |
| 10th Author's Affiliation | Low-power Electronics Association & Project (LEAP) |
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| Speaker | Author-1 |
| Date Time | 2014-01-29 14:40:00 |
| Presentation Time | 25 minutes |
| Registration for | SDM |
| Paper # | SDM2013-143 |
| Volume (vol) | vol.113 |
| Number (no) | no.420 |
| Page | pp.35-38 |
| #Pages | 4 |
| Date of Issue | 2014-01-22 (SDM) |
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