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Presentation 2014-01-28 15:00
[Poster Presentation] Low-Power 28nm FD-SOI SRAM for Image Processor
Yuta Kawamoto, Shusuke Yoshimoto, Tomoki Nakagawa, Yuki Kitahara, Haruki Mori, Kenta Takagi, Shintaro Izumi (Kobe Univ.), Koji Nii (Renesas Electronics), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2013-116 Link to ES Tech. Rep. Archives: ICD2013-116
Abstract (in Japanese) (See Japanese page) 
(in English) In recent years, image recognition has been applied to various fields such as an automatic driving system. SRAM (Static Random Access Memory) is used as memory for image processing; a data amount and an area of the image processing memory on a chip are increasing with image resolution. The power consumption of the image processing memory is increasing as well. In a 65-nm process, the memory power occupies 43% in an image processor, and it comes to 60% in a 28-nm process. In particular, the feature of the low-power image processing memory is required for wearable electronics.
We propose a low-power SRAM for image processing. We will show SPICE simulation results using a 28-nm FD-SOI technology in the poster presentation.
Keyword (in Japanese) (See Japanese page) 
(in English) SRAM / Image Processor / FD-SOI / 28nm / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 419, ICD2013-116, pp. 41-41, Jan. 2014.
Paper # ICD2013-116 
Date of Issue 2014-01-21 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2013-116 Link to ES Tech. Rep. Archives: ICD2013-116

Conference Information
Committee ICD  
Conference Date 2014-01-28 - 2014-01-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Kyoto Univ. Tokeidai Kinenkan 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2014-01-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Low-Power 28nm FD-SOI SRAM for Image Processor 
Sub Title (in English)  
Keyword(1) SRAM  
Keyword(2) Image Processor  
Keyword(3) FD-SOI  
Keyword(4) 28nm  
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1st Author's Name Yuta Kawamoto  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Shusuke Yoshimoto  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Tomoki Nakagawa  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Yuki Kitahara  
4th Author's Affiliation Kobe University (Kobe Univ.)
5th Author's Name Haruki Mori  
5th Author's Affiliation Kobe University (Kobe Univ.)
6th Author's Name Kenta Takagi  
6th Author's Affiliation Kobe University (Kobe Univ.)
7th Author's Name Shintaro Izumi  
7th Author's Affiliation Kobe University (Kobe Univ.)
8th Author's Name Koji Nii  
8th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
9th Author's Name Hiroshi Kawaguchi  
9th Author's Affiliation Kobe University (Kobe Univ.)
10th Author's Name Masahiko Yoshimoto  
10th Author's Affiliation Kobe University (Kobe Univ.)
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Speaker Author-1 
Date Time 2014-01-28 15:00:00 
Presentation Time 120 minutes 
Registration for ICD 
Paper # ICD2013-116 
Volume (vol) vol.113 
Number (no) no.419 
Page p.41 
#Pages
Date of Issue 2014-01-21 (ICD) 


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