Paper Abstract and Keywords |
Presentation |
2013-08-23 14:25
A Circuit Implementation of Power-saved ONU Modulation Processing for IFDMA-PON System using a Polar Coordinate Transformation Kenji Ishii, Kiyoshi Onohara, Yuji Akiyama, Masaki Noda, Kazuumi Koguchi, Masamichi Nogami (Mitsubishi Electric), Yuki Yoshida, Akihiro Maruta (Osaka Univ.), Takashi Mizuochi (Mitsubishi Electric), Ken-ichi Kitayama (Osaka Univ.) OCS2013-44 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In the PON system using the OFDMA technique, there is a problem that the power consumption of the IFFT circuit for generating multiple sub-carriers increases in proportion to the speed of the sampling rate and the number of subcarriers. In this paper, we proposed power-saving implementation of IFDMA modulation processing circuit that can multiplex subcarriers at low power. And we developed 12Gbps real-time IFDMA modulation circuit of ONU that was implemented in FPGA of 40nm process for IFDMA-PON, which realized elastic bandwidth allocation and low-power implementation of 0.82W. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Digital Signal Processing / FTTH / IFDMA / PON / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 113, no. 182, OCS2013-44, pp. 43-48, Aug. 2013. |
Paper # |
OCS2013-44 |
Date of Issue |
2013-08-15 (OCS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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OCS2013-44 |
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