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Paper Abstract and Keywords
Presentation 2013-08-02 09:50
A cost-effective 45nm 6T-SRAM reducing 50mV Vmin and 53% standby leakage with multi-Vt asymmetric halo MOS and write assist circuitry
Koji Nii, Makoto Yabuuchi, Hidehiro Fujiwara, Yasumasa Tsukamoto, Yuichiro Ishii (Renesas Electronics), Tetsuya Matsumura (Nihon Univ.), Yoshio Matsuda (Kanazawa Univ.) SDM2013-76 ICD2013-58 Link to ES Tech. Rep. Archives: SDM2013-76 ICD2013-58
Abstract (in Japanese) (See Japanese page) 
(in English) (Not available yet)
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(in English) / / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 173, ICD2013-58, pp. 53-57, Aug. 2013.
Paper # ICD2013-58 
Date of Issue 2013-07-25 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2013-76 ICD2013-58 Link to ES Tech. Rep. Archives: SDM2013-76 ICD2013-58

Conference Information
Committee SDM ICD  
Conference Date 2013-08-01 - 2013-08-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Kanazawa University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Low voltage/low power techniques, novel devices, circuits, and applications 
Paper Information
Registration To ICD 
Conference Code 2013-08-SDM-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A cost-effective 45nm 6T-SRAM reducing 50mV Vmin and 53% standby leakage with multi-Vt asymmetric halo MOS and write assist circuitry 
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1st Author's Name Koji Nii  
1st Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
2nd Author's Name Makoto Yabuuchi  
2nd Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
3rd Author's Name Hidehiro Fujiwara  
3rd Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
4th Author's Name Yasumasa Tsukamoto  
4th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
5th Author's Name Yuichiro Ishii  
5th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
6th Author's Name Tetsuya Matsumura  
6th Author's Affiliation Nihon University (Nihon Univ.)
7th Author's Name Yoshio Matsuda  
7th Author's Affiliation Kanazawa University (Kanazawa Univ.)
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Speaker
Date Time 2013-08-02 09:50:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-SDM2013-76,IEICE-ICD2013-58 
Volume (vol) IEICE-113 
Number (no) no.172(SDM), no.173(ICD) 
Page pp.53-57 
#Pages IEICE-5 
Date of Issue IEICE-SDM-2013-07-25,IEICE-ICD-2013-07-25 


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