Paper Abstract and Keywords |
Presentation |
2013-08-01 13:45
[Invited Talk]
Design and diagnosis of 100GB/s Wide I/O with 4096b TSVs through Active Silicon Interposer Makoto Nagata, Satoshi Takaya (Kobe Univ.), Hiroaki Ikeda (ASET) SDM2013-71 ICD2013-53 Link to ES Tech. Rep. Archives: SDM2013-71 ICD2013-53 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A 4096-bit wide I/O bus structure is designed and demonstrated with a three dimensional chip stack incorporating memory, interposer, and logic dice. The stack realizes the data transfer at 100 GByte/sec and power consumption of 0.56 pJ/bit. The interposer embeds an on-chip monitor to see waveforms of signals and power nets through TSVs in the stack. It was shown that the eye diagrams exhibited sufficiently wide margin, and the power noise was well suppressed at the highest date rate. The technique will be helpful for the diagnosis of signal and power integrity in a 3D chip stack. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Through silicon via / On-chip monitor / Ultra wide I/O bus / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 113, no. 173, ICD2013-53, pp. 31-34, Aug. 2013. |
Paper # |
ICD2013-53 |
Date of Issue |
2013-07-25 (SDM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
SDM2013-71 ICD2013-53 Link to ES Tech. Rep. Archives: SDM2013-71 ICD2013-53 |
Conference Information |
Committee |
SDM ICD |
Conference Date |
2013-08-01 - 2013-08-02 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kanazawa University |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Low voltage/low power techniques, novel devices, circuits, and applications |
Paper Information |
Registration To |
ICD |
Conference Code |
2013-08-SDM-ICD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Design and diagnosis of 100GB/s Wide I/O with 4096b TSVs through Active Silicon Interposer |
Sub Title (in English) |
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Through silicon via |
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On-chip monitor |
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Ultra wide I/O bus |
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1st Author's Name |
Makoto Nagata |
1st Author's Affiliation |
Kobe University (Kobe Univ.) |
2nd Author's Name |
Satoshi Takaya |
2nd Author's Affiliation |
Kobe University (Kobe Univ.) |
3rd Author's Name |
Hiroaki Ikeda |
3rd Author's Affiliation |
Association of Super-Advanced Electronics Technologies (ASET) |
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Speaker |
Author-1 |
Date Time |
2013-08-01 13:45:00 |
Presentation Time |
45 minutes |
Registration for |
ICD |
Paper # |
SDM2013-71, ICD2013-53 |
Volume (vol) |
vol.113 |
Number (no) |
no.172(SDM), no.173(ICD) |
Page |
pp.31-34 |
#Pages |
4 |
Date of Issue |
2013-07-25 (SDM, ICD) |
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