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Paper Abstract and Keywords
Presentation 2013-07-11 14:25
Design Method of On-Board RL Snubber Inserted in Power Distribution Network of Integrated Circuits
Ryosuke Yamagata, Kengo Iokibe, Yoshitaka Toyota (Okayama Univ.) EMCJ2013-34
Abstract (in Japanese) (See Japanese page) 
(in English) The power distribution network (PDN) of modern integrated circuits (ICs) have parasitic impedances along power and ground traces, vias, and components as well as nominal impedances of the components: capacitors, voltage regulators, filters, and ICs.
Such parasitic impedances, at the resonant frequency, may increase the radio frequency (RF) power current to cause conducted EM radiation and surge the PDN input impedance to induce power bounces.
There is the RL snubber circuit that had been applied to a typical PDN decreasing the RF power current and descending the PDN input impedance by damping the parasitic impedance resonance.
The RL snubber is composed of a parallel pair of decoupling inductor and damping resister.
This report introduced a design method of the RL snubber for the parasitic impedance resonance of on-board parasitic capacitances.
In the design method, the allowable range of the decoupling inductance was restricted for practical use of the method to simplify the equivalent circuit that expressed the target resonance.
The simplified equivalent circuit was a 2nd order circuit whereas the original one was 3rd order.
With the restricted inductance, an optimal resistance was determined in accordance with the critical damping conditions of the 2nd order circuit.
Finally, the design method was evaluated on the basis of the circuit simulation calculating the current transmittance and PDN input impedance.
As a result, the introduced design method was confirmed to reduce as much RF power current and power bounce as the more thetically strict way.
Moreover, the method was found to be able to be more practical by relaxing the restriction on the decoupling inductance of RL snubber.
Keyword (in Japanese) (See Japanese page) 
(in English) EMC / IC / Power Distribution Network / Damping Resister / Power Integnity / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 122, EMCJ2013-34, pp. 39-43, July 2013.
Paper # EMCJ2013-34 
Date of Issue 2013-07-04 (EMCJ) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EMCJ2013-34

Conference Information
Committee EMCJ  
Conference Date 2013-07-11 - 2013-07-11 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Young Scientists meeting 
Paper Information
Registration To EMCJ 
Conference Code 2013-07-EMCJ 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design Method of On-Board RL Snubber Inserted in Power Distribution Network of Integrated Circuits 
Sub Title (in English)  
Keyword(1) EMC  
Keyword(2) IC  
Keyword(3) Power Distribution Network  
Keyword(4) Damping Resister  
Keyword(5) Power Integnity  
1st Author's Name Ryosuke Yamagata  
1st Author's Affiliation Okayama University (Okayama Univ.)
2nd Author's Name Kengo Iokibe  
2nd Author's Affiliation Okayama University (Okayama Univ.)
3rd Author's Name Yoshitaka Toyota  
3rd Author's Affiliation Okayama University (Okayama Univ.)
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Date Time 2013-07-11 14:25:00 
Presentation Time 25 
Registration for EMCJ 
Paper # IEICE-EMCJ2013-34 
Volume (vol) IEICE-113 
Number (no) no.122 
Page pp.39-43 
#Pages IEICE-5 
Date of Issue IEICE-EMCJ-2013-07-04 

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