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Paper Abstract and Keywords
Presentation 2013-03-14 15:30
Evaluation Environment for Configuration of Floating-Point Unit Arrays
Yuya Itoh, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) CPSY2012-94 DC2012-100
Abstract (in Japanese) (See Japanese page) 
(in English) A floating-point unit array that is constructed by connecting floating-point units, is expected to be an excellent architecture for calculating a huge amount of operation in scientific computation such as signal and image processing.
In this paper, we develop an evaluation environment for the configuration of a floating-point unit array.
In the evaluation environment, we can define various floating-point unit arrays and analyze precision of them.
By using the evaluation environment, we can explore the optimal configuration of a floating-point unit array, including a suitable data format with respect to each application.
In this paper, we show some case studies by using the evaluation environment for demonstrating the usefulness for considering the configuration of the floating-point unit array and the data format.
Keyword (in Japanese) (See Japanese page) 
(in English) floating-point unit array / evaluation environment / IEEE 754 / / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 481, CPSY2012-94, pp. 253-258, March 2013.
Paper # CPSY2012-94 
Date of Issue 2013-03-07 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2012-94 DC2012-100

Conference Information
Committee CPSY DC IPSJ-SLDM IPSJ-EMB  
Conference Date 2013-03-13 - 2013-03-14 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
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Paper Information
Registration To CPSY 
Conference Code 2013-03-CPSY-DC-SLDM-EMB 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Evaluation Environment for Configuration of Floating-Point Unit Arrays 
Sub Title (in English)  
Keyword(1) floating-point unit array  
Keyword(2) evaluation environment  
Keyword(3) IEEE 754  
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1st Author's Name Yuya Itoh  
1st Author's Affiliation Kyoto University (Kyoto Univ.)
2nd Author's Name Hideki Takase  
2nd Author's Affiliation Kyoto University (Kyoto Univ.)
3rd Author's Name Kazuyoshi Takagi  
3rd Author's Affiliation Kyoto University (Kyoto Univ.)
4th Author's Name Naofumi Takagi  
4th Author's Affiliation Kyoto University (Kyoto Univ.)
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Speaker Author-1 
Date Time 2013-03-14 15:30:00 
Presentation Time 25 minutes 
Registration for CPSY 
Paper # CPSY2012-94, DC2012-100 
Volume (vol) vol.112 
Number (no) no.481(CPSY), no.482(DC) 
Page pp.253-258 
#Pages
Date of Issue 2013-03-07 (CPSY, DC) 


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