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Paper Abstract and Keywords
Presentation 2013-03-06 10:30
A worst-case-aware design methodology for oscillator-based true random number generator with stochastic behavior modeling
Takehiko Amaki, Masanori Hashimoto (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. of Tech.), Takao Onoye (Osaka Univ.) VLD2012-154
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents a worst-case-aware design methodology for an oscillator-based true random number generator (TRNG) robust to deterministic noise. The proposed design methodology estimates $\chi$ value of a poker test in the worst case under deterministic noise with a stochastic behavior model. Then, the design methodology determines design parameters considering the worst $\chi$ value. This work analytically proves that the randomness gets the lowest in the worst case. Thus, the proposed design methodology guarantees sufficient randomness even under deterministic noise.
Keyword (in Japanese) (See Japanese page) 
(in English) true random number generator / jitter / stochastic model / Markov chain / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 451, VLD2012-154, pp. 99-104, March 2013.
Paper # VLD2012-154 
Date of Issue 2013-02-25 (VLD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee VLD  
Conference Date 2013-03-04 - 2013-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Seinen Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon 
Paper Information
Registration To VLD 
Conference Code 2013-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A worst-case-aware design methodology for oscillator-based true random number generator with stochastic behavior modeling 
Sub Title (in English)  
Keyword(1) true random number generator  
Keyword(2) jitter  
Keyword(3) stochastic model  
Keyword(4) Markov chain  
1st Author's Name Takehiko Amaki  
1st Author's Affiliation Osaka University (Osaka Univ.)
2nd Author's Name Masanori Hashimoto  
2nd Author's Affiliation Osaka University (Osaka Univ.)
3rd Author's Name Yukio Mitsuyama  
3rd Author's Affiliation Kochi University of Technology (Kochi Univ. of Tech.)
4th Author's Name Takao Onoye  
4th Author's Affiliation Osaka University (Osaka Univ.)
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Date Time 2013-03-06 10:30:00 
Presentation Time 25 
Registration for VLD 
Paper # IEICE-VLD2012-154 
Volume (vol) IEICE-112 
Number (no) no.451 
Page pp.99-104 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2013-02-25 

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