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Paper Abstract and Keywords
Presentation 2013-03-05 10:25
An Acceleration method and its evaluation for Coarse Grained Reconfigurable Circuit Synthesis
Nobuyuki Araki, Takashi Kambe (Kinki Univ.) VLD2012-144
Abstract (in Japanese) (See Japanese page) 
(in English) High level synthesis for Coarse-grained architecture Reconfigurable Computing(CGA-RC) from high-level description is urgent to improve its design efficiency.
To do it, we have to achieve both good performance and high PE(Processing Element) utilization automatically for all application.
To address this issue, we focus on nested loop conversion and critical path based allocation to PE, propose an algorithm to generate circuit configuration automatically, and compare with other algorithms to evaluate its performance.
Keyword (in Japanese) (See Japanese page) 
(in English) Reconfiguralble Computing(RC) / configuration generation / DAPDNA-2 / / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 451, VLD2012-144, pp. 49-54, March 2013.
Paper # VLD2012-144 
Date of Issue 2013-02-25 (VLD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee VLD  
Conference Date 2013-03-04 - 2013-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Seinen Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon 
Paper Information
Registration To VLD 
Conference Code 2013-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An Acceleration method and its evaluation for Coarse Grained Reconfigurable Circuit Synthesis 
Sub Title (in English)  
Keyword(1) Reconfiguralble Computing(RC)  
Keyword(2) configuration generation  
Keyword(3) DAPDNA-2  
1st Author's Name Nobuyuki Araki  
1st Author's Affiliation Kinki University (Kinki Univ.)
2nd Author's Name Takashi Kambe  
2nd Author's Affiliation Kinki University (Kinki Univ.)
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Date Time 2013-03-05 10:25:00 
Presentation Time 25 
Registration for VLD 
Paper # IEICE-VLD2012-144 
Volume (vol) IEICE-112 
Number (no) no.451 
Page pp.49-54 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2013-02-25 

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