Paper Abstract and Keywords |
Presentation |
2013-03-04 15:45
TSV-aware Analytical Placement Koji Morita, Yasuhiro Takashima (Univ. of Kitakyushu) VLD2012-140 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In this paper, we propose a TSV-aware anlytical placement. Recently, to implement much large-scale LSI, a multi-layer LSI is promising. In the layout of the blocks for the multi-layer LSI, we should decide the layer
assignment and the position of each block. For the layout of the multi-layer LSI, there have been 1) two-step optimization which completes the placement after the layer assignment, and 2) simultaneous optimizaion. But, the two-step optimization limits the performance of the placement by the result of the assignment. On the other hand,the previous simultaneous optimization does not consider TSVs, which are necessary to implement the nets over the multi-layers. In this paper, we propose a TSV-aware simultaneous optimization method based on the analytical placement. If a net exists over the muliple layers, then we consider the exact area of TSVs. Otherwise, we deal TSV as a point. We conrm the efficiency of the proposed method by applying the method to a small example. Key words TSV, Analytical placement, Overlap removable length |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
TSV / Analytical placement / Overlap removable length / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 112, no. 451, VLD2012-140, pp. 25-29, March 2013. |
Paper # |
VLD2012-140 |
Date of Issue |
2013-02-25 (VLD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2012-140 |
Conference Information |
Committee |
VLD |
Conference Date |
2013-03-04 - 2013-03-06 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Okinawa Seinen Kaikan |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Technology for System-on-Silicon |
Paper Information |
Registration To |
VLD |
Conference Code |
2013-03-VLD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
TSV-aware Analytical Placement |
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TSV |
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Analytical placement |
Keyword(3) |
Overlap removable length |
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1st Author's Name |
Koji Morita |
1st Author's Affiliation |
University of Kitakyushu (Univ. of Kitakyushu) |
2nd Author's Name |
Yasuhiro Takashima |
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University of Kitakyushu (Univ. of Kitakyushu) |
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Speaker |
Author-1 |
Date Time |
2013-03-04 15:45:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2012-140 |
Volume (vol) |
vol.112 |
Number (no) |
no.451 |
Page |
pp.25-29 |
#Pages |
5 |
Date of Issue |
2013-02-25 (VLD) |
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