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| Presentation | 2013-03-04 13:50 A Logic Simplification Algorithm with Multiple Stuck-at Faults for Error Tolerant Application Junpei Kamei, Shingo Matsuki, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)  VLD2012-136 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In error tolerant applications, some specific errors, which are of certain types or have severities within certain limits, of LSIs are tolerable. In this paper, we focus on logic optimization of circuits for error tolerant application. To identify removable portions of a logic circuit, the authors check acceptability of stuck-at faults in the circuit by utilizing a time-consuming threshold test generation algorithm[10]. We propose a logic optimization algorithm to reduce the computational effort to identify acceptable faults. In order to achieve this objective, the proposed algorithm (1) targets only faults whose acceptability is high for acceptability identification and, (2) utilizes a redundancy identification procedure, i.e., a general test generation algorithm, whose computational effort is small, in combination with the threshold test generation algorithm. Experimental results show that, compared with the previous algorithm, the proposed algorithm can not only reduce the computational effort but also increase in the ability of logic optimization. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Acceptability identification / redundancy elimination / multiple faults / logic optimization / threshold test generation / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 451, VLD2012-136, pp. 1-6, March 2013. | |
| Paper # | VLD2012-136 | |
| Date of Issue | 2013-02-25 (VLD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2012-136 |
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| Conference Information | |
| Committee | VLD |
| Conference Date | 2013-03-04 - 2013-03-06 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2013-03-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Logic Simplification Algorithm with Multiple Stuck-at Faults for Error Tolerant Application |
| Sub Title (in English) | |
| Keyword(1) | Acceptability identification |
| Keyword(2) | redundancy elimination |
| Keyword(3) | multiple faults |
| Keyword(4) | logic optimization |
| Keyword(5) | threshold test generation |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Junpei Kamei |
| 1st Author's Affiliation | Hiroshima City University (Hiroshima City Univ.) |
| 2nd Author's Name | Shingo Matsuki |
| 2nd Author's Affiliation | Hiroshima City University (Hiroshima City Univ.) |
| 3rd Author's Name | Tsuyoshi Iwagaki |
| 3rd Author's Affiliation | Hiroshima City University (Hiroshima City Univ.) |
| 4th Author's Name | Hideyuki Ichihara |
| 4th Author's Affiliation | Hiroshima City University (Hiroshima City Univ.) |
| 5th Author's Name | Tomoo Inoue |
| 5th Author's Affiliation | Hiroshima City University (Hiroshima City Univ.) |
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| Speaker | Author-1 |
| Date Time | 2013-03-04 13:50:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2012-136 |
| Volume (vol) | vol.112 |
| Number (no) | no.451 |
| Page | pp.1-6 |
| #Pages | 6 |
| Date of Issue | 2013-02-25 (VLD) |
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