IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2013-01-16 11:25
Implementation of a neural network for FPGA-based digital DC-DC converters
Yoshihiko Yamabe, Masashi Motomura, Kentaro Yamashita, Hidenori Maruta, Yuichiro Shibata, Kiyoshi Oguri, Fujio Kurokawa (Nagasaki Univ.) VLD2012-112 CPSY2012-61 RECONF2012-66
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper, we present implementation and evaluation of an FPGA-based neural network for controlling DC-DC converters. Experimantal results showed dynamic characteristics of a DC-DC converter are improved by 48% in convergence time using an offline-trained neural network. In addition, simulation results showed that an online-trained neural network can further improve the control accuracy. Our design occupies only 19\% of available resources of a moderate-sized FPGA, suggesting a possibility of a combined approach of newural networks and other control methods.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / switching power supply / Neural Network / DC-DC converter / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 377, RECONF2012-66, pp. 31-36, Jan. 2013.
Paper # RECONF2012-66 
Date of Issue 2013-01-09 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2012-112 CPSY2012-61 RECONF2012-66

Conference Information
Committee CPSY VLD RECONF IPSJ-SLDM  
Conference Date 2013-01-16 - 2013-01-17 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To RECONF 
Conference Code 2013-01-CPSY-VLD-RECONF-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Implementation of a neural network for FPGA-based digital DC-DC converters 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) switching power supply  
Keyword(3) Neural Network  
Keyword(4) DC-DC converter  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yoshihiko Yamabe  
1st Author's Affiliation Nagasaki University (Nagasaki Univ.)
2nd Author's Name Masashi Motomura  
2nd Author's Affiliation Nagasaki University (Nagasaki Univ.)
3rd Author's Name Kentaro Yamashita  
3rd Author's Affiliation Nagasaki University (Nagasaki Univ.)
4th Author's Name Hidenori Maruta  
4th Author's Affiliation Nagasaki University (Nagasaki Univ.)
5th Author's Name Yuichiro Shibata  
5th Author's Affiliation Nagasaki University (Nagasaki Univ.)
6th Author's Name Kiyoshi Oguri  
6th Author's Affiliation Nagasaki University (Nagasaki Univ.)
7th Author's Name Fujio Kurokawa  
7th Author's Affiliation Nagasaki University (Nagasaki Univ.)
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2013-01-16 11:25:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # VLD2012-112, CPSY2012-61, RECONF2012-66 
Volume (vol) vol.112 
Number (no) no.375(VLD), no.376(CPSY), no.377(RECONF) 
Page pp.31-36 
#Pages
Date of Issue 2013-01-09 (VLD, CPSY, RECONF) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan