IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2012-12-07 13:00
Neural Network using Thin-Film Transistors -- Working Confirmation of Asymmetric Circuit --
Mutsumi Kimura, Yuki Yamaguchi, Ryohei Morita, Yusuke Fujita, Tomoaki Miyatani, Tomohiro Kasakawa (Ryukoku Univ.) SDM2012-123 Link to ES Tech. Rep. Archives: SDM2012-123
Abstract (in Japanese) (See Japanese page) 
(in English) We are developing neural networks of device level using thin-film transistors (TFT). By adopting an interconnect-type neural network and utilizing a characteristic shift of poly-Si TFTs as a variable strength of synapse connection, which was originally an issue, we realized the neuron consisting of 8 TFTs and synapse of only one TFT. Particularly in this presentation, we confirmed the working by a circuit where the input and output elements are asymmetric. This is a result leading to a super-large, self-learning, and high-flexibility system.
Keyword (in Japanese) (See Japanese page) 
(in English) Thin-Film Transistor (TFT) / Neural Network / Asymmetric Circuit / / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 337, SDM2012-123, pp. 47-52, Dec. 2012.
Paper # SDM2012-123 
Date of Issue 2012-11-30 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2012-123 Link to ES Tech. Rep. Archives: SDM2012-123

Conference Information
Committee SDM  
Conference Date 2012-12-07 - 2012-12-07 
Place (in Japanese) (See Japanese page) 
Place (in English) Kyoto Univ. (Katsura) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Fabrication and Characterization of Si-related Materials and Devices 
Paper Information
Registration To SDM 
Conference Code 2012-12-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Neural Network using Thin-Film Transistors 
Sub Title (in English) Working Confirmation of Asymmetric Circuit 
Keyword(1) Thin-Film Transistor (TFT)  
Keyword(2) Neural Network  
Keyword(3) Asymmetric Circuit  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Mutsumi Kimura  
1st Author's Affiliation Ryukoku University (Ryukoku Univ.)
2nd Author's Name Yuki Yamaguchi  
2nd Author's Affiliation Ryukoku University (Ryukoku Univ.)
3rd Author's Name Ryohei Morita  
3rd Author's Affiliation Ryukoku University (Ryukoku Univ.)
4th Author's Name Yusuke Fujita  
4th Author's Affiliation Ryukoku University (Ryukoku Univ.)
5th Author's Name Tomoaki Miyatani  
5th Author's Affiliation Ryukoku University (Ryukoku Univ.)
6th Author's Name Tomohiro Kasakawa  
6th Author's Affiliation Ryukoku University (Ryukoku Univ.)
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2012-12-07 13:00:00 
Presentation Time 15 minutes 
Registration for SDM 
Paper # SDM2012-123 
Volume (vol) vol.112 
Number (no) no.337 
Page pp.47-52 
#Pages
Date of Issue 2012-11-30 (SDM) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan