Paper Abstract and Keywords |
Presentation |
2012-11-28 13:25
A 3D FPGA-Array HPC System "Vocalise" and its Performance Evaluation Yusuke Atsumari, Jiang Li, Hiromasa Kubo, Hakaru Tamukoh, Masatoshi Sekine (TUAT) VLD2012-94 DC2012-60 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We have developed a 10cm square card with a three-dimensional I/O that installed a 4 million system gate scale FPGA and have already confirmed its basic operation. We are building a High Performance Computing (HPC) system constituted by connecting the card in the shape of a three-dimensional array. We called that HPC system as a Virtual Object by Configurable Array of Little Scalable Engine (Vocalise). In this report, the communication circuit of this HPC system is described. In addition, we implement a Poisson's equation arithmetic circuit on the system, and report its operation performance and power consumption. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Vocalise / FPGA-Array / Reconfigurable HPC / Poisson's equation / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 112, no. 320, VLD2012-94, pp. 201-206, Nov. 2012. |
Paper # |
VLD2012-94 |
Date of Issue |
2012-11-19 (VLD, DC) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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VLD2012-94 DC2012-60 |
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