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| Presentation | 2012-11-28 09:50 Development of SoC Fast Electric Power Estimation System FPA2 Takayuki Sasaki (FUJITSU LAB.)  CPM2012-118 ICD2012-82 Link to ES Tech. Rep. Archives: CPM2012-118 ICD2012-82 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | FPA2 (Fast Power Analyzer 2) was developed and is fast electric power estimation system for SoC (System on a Chip). Since this system calculates toggles(changes of signals) by a hardware emulator and calculates electric power of partial circuit of constant toggles and using these data creates data of electric power changes of some seconds within 1 week, this system is fast. This system created data of electric power changes of 1.8 seconds of 2.6 million cells video LSI with 6.5 hours. This paper shows design choices for system development. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Hardware Emulator / Electric Power Estimation / SoC / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 324, ICD2012-82, pp. 31-36, Nov. 2012. | |
| Paper # | ICD2012-82 | |
| Date of Issue | 2012-11-20 (CPM, ICD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPM2012-118 ICD2012-82 Link to ES Tech. Rep. Archives: CPM2012-118 ICD2012-82 |
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| Conference Information | |
| Committee | VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
| Conference Date | 2012-11-26 - 2012-11-28 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Centennial Hall Kyushu University School of Medicine |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2012 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2012-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of SoC Fast Electric Power Estimation System FPA2 |
| Sub Title (in English) | |
| Keyword(1) | Hardware Emulator |
| Keyword(2) | Electric Power Estimation |
| Keyword(3) | SoC |
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| 1st Author's Name | Takayuki Sasaki |
| 1st Author's Affiliation | FUJITSU LABORATORIES LTD. (FUJITSU LAB.) |
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| Speaker | Author-1 |
| Date Time | 2012-11-28 09:50:00 |
| Presentation Time | 25 minutes |
| Registration for | ICD |
| Paper # | CPM2012-118, ICD2012-82 |
| Volume (vol) | vol.112 |
| Number (no) | no.323(CPM), no.324(ICD) |
| Page | pp.31-36 |
| #Pages | 6 |
| Date of Issue | 2012-11-20 (CPM, ICD) |
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