Paper Abstract and Keywords |
Presentation |
2012-11-27 13:25
Analytical model of energy dissipation for comparing adder architectures Nao Konishi, Kimiyoshi Usami (Shibaura I.T.) VLD2012-80 DC2012-46 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper describes analytical models for delay and energy dissipation of ripple-carry, carry look-ahead, and parallel prefix adders operating at the sub-threshold voltage region. Effects and magnitude relationship by bit width can demonstrate comparing analytical model of adder architectures. As a result, Ripple carry adder is most affected, and Brent-Kung Parallel prefix adder is most unaffected by increasing bit width. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Adder / Low Power Technique / Analytical Model / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 112, no. 320, VLD2012-80, pp. 123-128, Nov. 2012. |
Paper # |
VLD2012-80 |
Date of Issue |
2012-11-19 (VLD, DC) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2012-80 DC2012-46 |
Conference Information |
Committee |
VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
Conference Date |
2012-11-26 - 2012-11-28 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Centennial Hall Kyushu University School of Medicine |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Gaia 2012 -New Field of VLSI Design- |
Paper Information |
Registration To |
VLD |
Conference Code |
2012-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Analytical model of energy dissipation for comparing adder architectures |
Sub Title (in English) |
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Adder |
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Low Power Technique |
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Analytical Model |
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1st Author's Name |
Nao Konishi |
1st Author's Affiliation |
Shibaura institute of technology (Shibaura I.T.) |
2nd Author's Name |
Kimiyoshi Usami |
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Shibaura institute of technology (Shibaura I.T.) |
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Speaker |
Author-1 |
Date Time |
2012-11-27 13:25:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2012-80, DC2012-46 |
Volume (vol) |
vol.112 |
Number (no) |
no.320(VLD), no.321(DC) |
Page |
pp.123-128 |
#Pages |
6 |
Date of Issue |
2012-11-19 (VLD, DC) |
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