Paper Abstract and Keywords |
Presentation |
2012-11-19 16:15
Fabrication of Stacked NAND Circuits using Solution-Processable Materials Isao Kodera, Hiroshi Yamauchi, Shigekazu Kuniyoshi, Masatoshi Sakai, Masaaki Iizuka, Kazuhiro Kudo (Chiba Univ.) OME2012-73 Link to ES Tech. Rep. Archives: OME2012-73 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In this study, we have demonstrated the NAND operation of a stacked-structure NAND circuit using TIPS-pentacene (6,13-Bis(triisopropylsilylethynyl)pentacene) and soluble ZnO as active layers. Bottom-gate-type TIPS-pentacene TFTs, as p-channel transistors, were formed on top of top-gate-type ZnO TFTs while sharing common gate electrodes. For both TFTs, solution-processed silicone-resin layers were used as gate dielectric. The stacked-structure NAND circuit has several advantages of, for example, easiness of active material patterning, compact device area per stage, and the short length of the interconnection as compared with the planar configuration in a conventional NAND circuit. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
stacked structure / NAND circuit / silicone-resin / TIPS-pentacene / ZnO / / / |
Reference Info. |
IEICE Tech. Rep., vol. 112, no. 304, OME2012-73, pp. 61-64, Nov. 2012. |
Paper # |
OME2012-73 |
Date of Issue |
2012-11-12 (OME) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
OME2012-73 Link to ES Tech. Rep. Archives: OME2012-73 |
Conference Information |
Committee |
OME |
Conference Date |
2012-11-19 - 2012-11-19 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Room 302, Nakanoshima Ctr., Osaka Univ. |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Organic Materials, etc. |
Paper Information |
Registration To |
OME |
Conference Code |
2012-11-OME |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Fabrication of Stacked NAND Circuits using Solution-Processable Materials |
Sub Title (in English) |
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Keyword(1) |
stacked structure |
Keyword(2) |
NAND circuit |
Keyword(3) |
silicone-resin |
Keyword(4) |
TIPS-pentacene |
Keyword(5) |
ZnO |
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1st Author's Name |
Isao Kodera |
1st Author's Affiliation |
Chiba University (Chiba Univ.) |
2nd Author's Name |
Hiroshi Yamauchi |
2nd Author's Affiliation |
Chiba University (Chiba Univ.) |
3rd Author's Name |
Shigekazu Kuniyoshi |
3rd Author's Affiliation |
Chiba University (Chiba Univ.) |
4th Author's Name |
Masatoshi Sakai |
4th Author's Affiliation |
Chiba University (Chiba Univ.) |
5th Author's Name |
Masaaki Iizuka |
5th Author's Affiliation |
Chiba University (Chiba Univ.) |
6th Author's Name |
Kazuhiro Kudo |
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Chiba University (Chiba Univ.) |
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Speaker |
Author-1 |
Date Time |
2012-11-19 16:15:00 |
Presentation Time |
25 minutes |
Registration for |
OME |
Paper # |
OME2012-73 |
Volume (vol) |
vol.112 |
Number (no) |
no.304 |
Page |
pp.61-64 |
#Pages |
4 |
Date of Issue |
2012-11-12 (OME) |
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