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Paper Abstract and Keywords
Presentation 2012-10-19 10:15
A 9-bit 10MSps SAR ADC with Double Input Range for Supply Voltage
Gong Chen, Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang, Jing Li (Design Algorithm Lab.) VLD2012-49 SIP2012-71 ICD2012-66 IE2012-73 Link to ES Tech. Rep. Archives: ICD2012-66
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents a pre-charge VCM-based method for 1.2V 9-bit 10MSps Successive Approximation
Register (SAR) ADC. This conversion mechanism achieves the twice range of the input signal range beyond the
supply voltage. We introduces a dynamic comparator with a special design and an additional comparison stage
before each redistribution stage in the pre-conversion. The prototype was designed on 65nm CMOS technology.
The simulation results shows INL and DNL 0.05 and 0.035 LSB respectively. The ADC consumes a total energy of
0.504 mW at a 1.2V supply and 10MSps.
Keyword (in Japanese) (See Japanese page) 
(in English) SAR-ADC / Double Input Ranage / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 247, ICD2012-66, pp. 49-53, Oct. 2012.
Paper # ICD2012-66 
Date of Issue 2012-10-11 (VLD, SIP, ICD, IE) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2012-49 SIP2012-71 ICD2012-66 IE2012-73 Link to ES Tech. Rep. Archives: ICD2012-66

Conference Information
Committee IE SIP ICD VLD IPSJ-SLDM  
Conference Date 2012-10-18 - 2012-10-19 
Place (in Japanese) (See Japanese page) 
Place (in English) Hotel Ruiz 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2012-10-IE-SIP-ICD-VLD-SLDM 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 9-bit 10MSps SAR ADC with Double Input Range for Supply Voltage 
Sub Title (in English)  
Keyword(1) SAR-ADC  
Keyword(2) Double Input Ranage  
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1st Author's Name Gong Chen  
1st Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
2nd Author's Name Yu Zhang  
2nd Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
3rd Author's Name Qing Dong  
3rd Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
4th Author's Name Shigetoshi Nakatake  
4th Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
5th Author's Name Bo Yang  
5th Author's Affiliation Design Algorithm Laboratory, Inc. (Design Algorithm Lab.)
6th Author's Name Jing Li  
6th Author's Affiliation Design Algorithm Laboratory, Inc. (Design Algorithm Lab.)
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Speaker
Date Time 2012-10-19 10:15:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-VLD2012-49,IEICE-SIP2012-71,IEICE-ICD2012-66,IEICE-IE2012-73 
Volume (vol) IEICE-112 
Number (no) no.245(VLD), no.246(SIP), no.247(ICD), no.248(IE) 
Page pp.49-53 
#Pages IEICE-5 
Date of Issue IEICE-VLD-2012-10-11,IEICE-SIP-2012-10-11,IEICE-ICD-2012-10-11,IEICE-IE-2012-10-11 


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