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| Presentation | 2012-08-03 14:30 Rack Layout Optimization for Random Network Topology Ikki Fujiwara, Michihiro Koibuchi (NII)  CPSY2012-25 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | As the scale of many-core parallel applications and supercomputer systems increases, the negative impact of communication latencies on performance becomes larger. It is thus necessary to use low-latency topology based on high-radix switches in supercomputer systems. We have previously reported that topologies, which are generated by augmenting classical topologies with random links, make latency shorter, although their wiring length becomes longer than that of non-random topologies, such as hypercube. In this study, to shorten the wiring length of the random topologies, (1) we generate imbalanced random shortcut link set, (2) we solve the optimization problem through their modeling on rack layout. Our analysis results show that wiring length is reduced by up to 38\% while communication latency is maintained. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | interconnection networks / random topology / cable length / cabinet layout / high-performance computing / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 173, CPSY2012-25, pp. 97-102, Aug. 2012. | |
| Paper # | CPSY2012-25 | |
| Date of Issue | 2012-07-26 (CPSY) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2012-25 |
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| Conference Information | |
| Committee | DC CPSY |
| Conference Date | 2012-08-02 - 2012-08-03 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Torigin Bunka Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Summer United Workshops on Parallel, Distributed and Cooperative Processing "Tottori" (SWoPP 2012) |
| Paper Information | |
| Registration To | CPSY |
| Conference Code | 2012-08-DC-CPSY |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Rack Layout Optimization for Random Network Topology |
| Sub Title (in English) | |
| Keyword(1) | interconnection networks |
| Keyword(2) | random topology |
| Keyword(3) | cable length |
| Keyword(4) | cabinet layout |
| Keyword(5) | high-performance computing |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Ikki Fujiwara |
| 1st Author's Affiliation | National Institute of Informatics (NII) |
| 2nd Author's Name | Michihiro Koibuchi |
| 2nd Author's Affiliation | National Institute of Informatics (NII) |
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| Speaker | Author-1 |
| Date Time | 2012-08-03 14:30:00 |
| Presentation Time | 30 minutes |
| Registration for | CPSY |
| Paper # | CPSY2012-25 |
| Volume (vol) | vol.112 |
| Number (no) | no.173 |
| Page | pp.97-102 |
| #Pages | 6 |
| Date of Issue | 2012-07-26 (CPSY) |
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