Paper Abstract and Keywords |
Presentation |
2012-08-02 14:15
3D Interconnect Technology by the Ultrawide-Interchip-Bus System for 3D Stacked LSI Systems Fumito Imura, Shunsuke Nemoto, Naoya Watanabe, Fumiki Kato, Katsuya Kikuchi, Hiroshi Nakagawa (AIST), Michiya Hagimoto, Hiroyuki Uchida, Takashi Omori, Yasumori Hibi, Yukoh Matsumoto (TOPS Systems), Masahiro Aoyagi (AIST) SDM2012-71 ICD2012-39 Link to ES Tech. Rep. Archives: SDM2012-71 ICD2012-39 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We have proposed the ultrawide-interchip-bus system for the interchip communication of the 3-dimentional stacked LSI systems. The ultrawide-interchip-bus is assembled in the center of the 3-D stacked LSI by interconnection of the TSVs and micro-bumps array. In this paper, the 3-D interconnect technology, which are achieved by the fabrication of low-capacitance TSVs and the low-stress bonding process of Au cone-bumps, on the basic concept of the ultrawide-interchips-bus system is reported. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
3D stacked LSI / TSV / Au cone-bump / 3D interconnect / Ultrawide interchip bus / / / |
Reference Info. |
IEICE Tech. Rep., vol. 112, no. 170, ICD2012-39, pp. 43-48, Aug. 2012. |
Paper # |
ICD2012-39 |
Date of Issue |
2012-07-26 (SDM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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SDM2012-71 ICD2012-39 Link to ES Tech. Rep. Archives: SDM2012-71 ICD2012-39 |
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