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| Presentation | 2012-08-02 16:15 Co-processor of a low power accelerator CMA Mai Izawa, Nobuaki Ozaki, Yusuke Koizumi, Rie Uno, Hideharu Amano (Keio Univ.)  CPSY2012-14 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Cool Mega-Array (CMA) is a novel high performance but low power reconfigurable accelerator consisting of a large PE(Processing Element) Array and small μ controller. Through the development of a prototype system Cube which uses CMA as an off-load engine of a host processor Geyser, we found two problems. First, the power consumption of a μ controller is sometimes higher than that of PE array. Second, the time for data transfer with host CPU occupies a large part of the total execution time. In order to address these problems, we proposed a new architecture called CMA-Geyser. CMA-Geyser has CMA as a co-processor of Geyser. From another viewpoint, Geyser is used instead of the μ controller of traditional CMA. The evaluation result of CMA-Geyser shows that the area is reduced by 23.4% compared with Cube. The performance of CMA-Geyser is 3.90 times of Geyser, and 2.46 times of Cube. The power consumption of CMA-Geyser is reduced by 191mW than Cube. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Low Power Design / Reconfigurable System / Co-processor / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 173, CPSY2012-14, pp. 31-36, Aug. 2012. | |
| Paper # | CPSY2012-14 | |
| Date of Issue | 2012-07-26 (CPSY) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2012-14 |
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| Conference Information | |
| Committee | DC CPSY |
| Conference Date | 2012-08-02 - 2012-08-03 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Torigin Bunka Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Summer United Workshops on Parallel, Distributed and Cooperative Processing "Tottori" (SWoPP 2012) |
| Paper Information | |
| Registration To | CPSY |
| Conference Code | 2012-08-DC-CPSY |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Co-processor of a low power accelerator CMA |
| Sub Title (in English) | |
| Keyword(1) | Low Power Design |
| Keyword(2) | Reconfigurable System |
| Keyword(3) | Co-processor |
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| 1st Author's Name | Mai Izawa |
| 1st Author's Affiliation | Keio Univ. (Keio Univ.) |
| 2nd Author's Name | Nobuaki Ozaki |
| 2nd Author's Affiliation | Keio Univ. (Keio Univ.) |
| 3rd Author's Name | Yusuke Koizumi |
| 3rd Author's Affiliation | Keio Univ. (Keio Univ.) |
| 4th Author's Name | Rie Uno |
| 4th Author's Affiliation | Keio Univ. (Keio Univ.) |
| 5th Author's Name | Hideharu Amano |
| 5th Author's Affiliation | Keio Univ. (Keio Univ.) |
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| Speaker | Author-1 |
| Date Time | 2012-08-02 16:15:00 |
| Presentation Time | 30 minutes |
| Registration for | CPSY |
| Paper # | CPSY2012-14 |
| Volume (vol) | vol.112 |
| Number (no) | no.173 |
| Page | pp.31-36 |
| #Pages | 6 |
| Date of Issue | 2012-07-26 (CPSY) |
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