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Paper Abstract and Keywords
Presentation 2012-06-29 12:00
Reliability Measurement of PFETs under Post Fabrication Self-Improvement Scheme for SRAM
Nurul Ezaila Alias, Anil Kumar, Takuya Saraya (Univ. of Tokyo), Shinji Miyano (STARC), Toshiro Hiramoto (Univ. of Tokyo)
Abstract (in Japanese) (See Japanese page) 
(in English) The negative bias temperature instability (NBTI) reliability of PFETs is measured under the post fabrication SRAM self-improvement scheme we have developed recently, where cell stability is self-improved by applying high stress voltage to supply voltage (Vdd) terminal. It is newly found that there is no significant difference in both threshold voltage and drain current degradation by NBTI between fresh PFETs and PFETs after the self-improvement scheme application. It is also shown that although the NBTI lifetime is shortened by the self-improvement scheme application, the lifetime difference is only slightly, indicating that the self-improvement scheme has no critical reliability problem.
Keyword (in Japanese) (See Japanese page) 
(in English) Negative Bias Temperature Instability (NBTI) / Variability / SRAM / / / / /  
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Conference Information
Committee SDM ED  
Conference Date 2012-06-27 - 2012-06-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Seinen-kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) 2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices 
Paper Information
Registration To SDM 
Conference Code 2012-06-SDM-ED 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Reliability Measurement of PFETs under Post Fabrication Self-Improvement Scheme for SRAM 
Sub Title (in English)  
Keyword(1) Negative Bias Temperature Instability (NBTI)  
Keyword(2) Variability  
Keyword(3) SRAM  
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1st Author's Name Nurul Ezaila Alias  
1st Author's Affiliation University of Tokyo (Univ. of Tokyo)
2nd Author's Name Anil Kumar  
2nd Author's Affiliation University of Tokyo (Univ. of Tokyo)
3rd Author's Name Takuya Saraya  
3rd Author's Affiliation University of Tokyo (Univ. of Tokyo)
4th Author's Name Shinji Miyano  
4th Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
5th Author's Name Toshiro Hiramoto  
5th Author's Affiliation University of Tokyo (Univ. of Tokyo)
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Speaker Author-1 
Date Time 2012-06-29 12:00:00 
Presentation Time 15 minutes 
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