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| Presentation | 2012-05-29 13:10 Implementation and Evaluation of FPGA-based Data Compression Hardware of Floating-Point Data-Stream Tomohiro Ueno, Yoshiaki Kono, Kentaro Sano, Satoru Yamamoto (Tohoku Univ.)  RECONF2012-7 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper presents FPGA-based implementation and performance analysis of the hardware for lossless compression of a floating-point data stream. The implementation includes the variable-to-fixed length converter (VF Converter) and the fixed-to-variable length converter (FV Converter). The prototype system on ALTERA Stratix IV FPGA demonstrates that the compressor and the decompressor are very small so that they each consume only 0.5 % adaptive LUTs of the total resource on the FPGA. The compressor and the decompressor can operate at about 240 MHz and 200 MHz. Such small but high-speed hardware modules can reduce the bandwidth by a factor of an average compression ratio. Evaluation with the computational results for 2D fluid simulation shows that the compressor has an average compression ratio of 3.7. This means that the compressor operating at 200 MHz can supply the bandwidth of 800 MB/s for single-precision floating-point numbers with the compressed bandwidth of 216 MB/s. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | data compression / FPGA / streaming computing / floating-point / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 70, RECONF2012-7, pp. 37-42, May 2012. | |
| Paper # | RECONF2012-7 | |
| Date of Issue | 2012-05-22 (RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Notes on Review | This article is a technical report without peer review, and its polished version will be published elsewhere. | |
| Download PDF | RECONF2012-7 |
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| Conference Information | |
| Committee | RECONF |
| Conference Date | 2012-05-29 - 2012-05-30 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Tiruru (Naha Okinawa, Japan) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2012-05-RECONF |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation and Evaluation of FPGA-based Data Compression Hardware of Floating-Point Data-Stream |
| Sub Title (in English) | |
| Keyword(1) | data compression |
| Keyword(2) | FPGA |
| Keyword(3) | streaming computing |
| Keyword(4) | floating-point |
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| 1st Author's Name | Tomohiro Ueno |
| 1st Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 2nd Author's Name | Yoshiaki Kono |
| 2nd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 3rd Author's Name | Kentaro Sano |
| 3rd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 4th Author's Name | Satoru Yamamoto |
| 4th Author's Affiliation | Tohoku University (Tohoku Univ.) |
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| Speaker | Author-1 |
| Date Time | 2012-05-29 13:10:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2012-7 |
| Volume (vol) | vol.112 |
| Number (no) | no.70 |
| Page | pp.37-42 |
| #Pages | 6 |
| Date of Issue | 2012-05-22 (RECONF) |
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