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| Presentation | 2012-05-29 15:10 Hard error avoidance for TMR module using dynamic relocation in an FPGA Hiroki Tanaka, Yoshihiro Ichinomiya, Sadaki Usagawa, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)  RECONF2012-11 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | FPGA can recover from hard-error by reconfiguring itself, avoiding the hard-error part.Especially, the fault recovery can dynamically recover by using partial reconfiguration.However, partial reconfiguration data is required to perform partial reconfiguration and extra memory resource is required.Therefore, we proposed the self-recovery system which combined triple module redundancy and relocation of partial reconfiguration data in an FPGA.While hard-error is concealed by triple module redundancy, proposed system dynamically recovers by relocating partial reconfiguration data of correct module on spare region.As a verification result, we checked that the proposed system could recover from hard-error by relocating in an FPGA. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Softcore Processor System / Hard Error / Partial Reconfiguration / Bitstream Relocation / Self-Repair / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 112, no. 70, RECONF2012-11, pp. 61-66, May 2012. | |
| Paper # | RECONF2012-11 | |
| Date of Issue | 2012-05-22 (RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Notes on Review | This article is a technical report without peer review, and its polished version will be published elsewhere. | |
| Download PDF | RECONF2012-11 |
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| Conference Information | |
| Committee | RECONF |
| Conference Date | 2012-05-29 - 2012-05-30 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Tiruru (Naha Okinawa, Japan) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2012-05-RECONF |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Hard error avoidance for TMR module using dynamic relocation in an FPGA |
| Sub Title (in English) | |
| Keyword(1) | Softcore Processor System |
| Keyword(2) | Hard Error |
| Keyword(3) | Partial Reconfiguration |
| Keyword(4) | Bitstream Relocation |
| Keyword(5) | Self-Repair |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Hiroki Tanaka |
| 1st Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 2nd Author's Name | Yoshihiro Ichinomiya |
| 2nd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 3rd Author's Name | Sadaki Usagawa |
| 3rd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 4th Author's Name | Motoki Amagasaki |
| 4th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 5th Author's Name | Masahiro Iida |
| 5th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 6th Author's Name | Morihiro Kuga |
| 6th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 7th Author's Name | Toshinori Sueyoshi |
| 7th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
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| Speaker | Author-1 |
| Date Time | 2012-05-29 15:10:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2012-11 |
| Volume (vol) | vol.112 |
| Number (no) | no.70 |
| Page | pp.61-66 |
| #Pages | 6 |
| Date of Issue | 2012-05-22 (RECONF) |
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