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Paper Abstract and Keywords
Presentation 2012-04-24 13:50
0.4V SRAM with Bit Line Swing Suppression Charge Share Hierarchical Bit Line Scheme
Shinichi Moriwaki, Atsushi Kawasumi (STARC), Toshikazu Suzuki (Panasonic), Yasue Yamamoto, Shinji Miyano, Hirofumi Shinohara (STARC), Takayasu Sakurai (Univ. of Tokyo) ICD2012-13 Link to ES Tech. Rep. Archives: ICD2012-13
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Reference Info. IEICE Tech. Rep., vol. 112, no. 15, ICD2012-13, pp. 67-71, April 2012.
Paper # ICD2012-13 
Date of Issue 2012-04-16 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee ICD  
Conference Date 2012-04-23 - 2012-04-24 
Place (in Japanese) (See Japanese page) 
Place (in English) Seion-so, Tsunagi Hot Spring (Iwate) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Memory Device Technologies 
Paper Information
Registration To ICD 
Conference Code 2012-04-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 0.4V SRAM with Bit Line Swing Suppression Charge Share Hierarchical Bit Line Scheme 
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1st Author's Name Shinichi Moriwaki  
1st Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
2nd Author's Name Atsushi Kawasumi  
2nd Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
3rd Author's Name Toshikazu Suzuki  
3rd Author's Affiliation Panasonic Corporation (Panasonic)
4th Author's Name Yasue Yamamoto  
4th Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
5th Author's Name Shinji Miyano  
5th Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
6th Author's Name Hirofumi Shinohara  
6th Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
7th Author's Name Takayasu Sakurai  
7th Author's Affiliation The University of Tokyo (Univ. of Tokyo)
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Date Time 2012-04-24 13:50:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # ICD2012-13 
Volume (vol) vol.112 
Number (no) no.15 
Page pp.67-71 
#Pages
Date of Issue 2012-04-16 (ICD) 


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