Paper Abstract and Keywords |
Presentation |
2012-04-23 13:20
[Invited Talk]
128Gb 3-Bit Per Cell NAND Flash Memory on 19nm Technology with 18MB/s Write Rate Teruhiko Kamei, Yan Li, Seungpil Lee, Ken Oowada, Hao Nguyen, Qui Nguyen, Nima Mokhlesi, Cynthia Hsu, Jason Li, Venky Ramachandra, Masaaki Higashitani, Tuan Pham, Mitsuyuki Watanabe (SanDisk), Mitsuaki Honma, Yoshihisa Watanabe (Toshiba) ICD2012-2 Link to ES Tech. Rep. Archives: ICD2012-2 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A 128Gb 8-level NAND flash memory using 19nm CMOS technology has been developed. 128Gb is the largest single-chip capacity NAND memory. At 170mm2 die size, this development achieves the highest Gb/mm2 in NAND flash memory. In addition to All Bit-Line (ABL) programming and sensing, Air Gap technology and a Toggle Mode 400Mbps I/O interface, along with improvements in sensing accuracy, enable this 3-bit per cell (X3) design to achieve a write throughput of 18MB/s using standard BCH ECC. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
NAND Flash Memory / 3bit/cell / MLC / 19nm CMOS / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 112, no. 15, ICD2012-2, pp. 7-12, April 2012. |
Paper # |
ICD2012-2 |
Date of Issue |
2012-04-16 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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ICD2012-2 Link to ES Tech. Rep. Archives: ICD2012-2 |
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