Paper Abstract and Keywords |
Presentation |
2012-03-16 14:50
A Study on Phase Comparator Sesitivity for Low Phase-Noise PLL Hideyasu Hobara, Yoshiki Kayano, Hiroshi Inoue (Akita Univ.) EMCJ2011-141 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
An UWB RF system can be used in the area of signal processing. The phase-noise of output voltage of the oscillator with Phase Locked Loop (PLL) should be suppressed for the performance. The low phase-noise characteristics as well as the broadband and high-frequency use are very important factor for the UWB application. In order to develop a low phase-noise PLL, we newly attempt to establish a method for designing the phase comparator with high sensitivity. A phase comparator is consisted of XOR with CMOS transistor. The W/L ratio related to the delay of CMOS transistor in the phase comparator was designed to improve the sensitivity. It was demonstrated by circuit simulation that the proposed phase comparator is effective in improving phase-noise of the PLL. This study reveals the basic considerations for low phase-noise PLL. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Phase Locked-Loop(PLL) / Phase Comparator / Low Phase-Noise / Sensitivity / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 111, no. 492, EMCJ2011-141, pp. 67-72, March 2012. |
Paper # |
EMCJ2011-141 |
Date of Issue |
2012-03-09 (EMCJ) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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EMCJ2011-141 |
Conference Information |
Committee |
EMCJ ITE-BCT |
Conference Date |
2012-03-16 - 2012-03-16 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Broadcast, EMC, etc. |
Paper Information |
Registration To |
EMCJ |
Conference Code |
2012-03-EMCJ-BCT |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Study on Phase Comparator Sesitivity for Low Phase-Noise PLL |
Sub Title (in English) |
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Keyword(1) |
Phase Locked-Loop(PLL) |
Keyword(2) |
Phase Comparator |
Keyword(3) |
Low Phase-Noise |
Keyword(4) |
Sensitivity |
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1st Author's Name |
Hideyasu Hobara |
1st Author's Affiliation |
Akita University (Akita Univ.) |
2nd Author's Name |
Yoshiki Kayano |
2nd Author's Affiliation |
Akita University (Akita Univ.) |
3rd Author's Name |
Hiroshi Inoue |
3rd Author's Affiliation |
Akita University (Akita Univ.) |
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Speaker |
Author-1 |
Date Time |
2012-03-16 14:50:00 |
Presentation Time |
25 minutes |
Registration for |
EMCJ |
Paper # |
EMCJ2011-141 |
Volume (vol) |
vol.111 |
Number (no) |
no.492 |
Page |
pp.67-72 |
#Pages |
6 |
Date of Issue |
2012-03-09 (EMCJ) |
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