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| Presentation | 2012-03-05 10:50 Basic Performance of a Logic-IP Compatible eDRAM with Cylinder Capacitors in Low-k/Cu BEOL Layers Ippei Kume, Naoya Inoue, Ken'ichiro Hijioka, Jun Kawahara, Koichi Takeda, Naoya Furutake, Hiroki Shirai, Kenya Kazama, Shin'ichi Kuwabara, Msasatoshi Watarai, Takashi Sakoh, Toshifumi Takahashi, Takashi Ogura, Toshiji Taiji, Yoshiko Kasama (Renesas Electronics)  SDM2011-177 Link to ES Tech. Rep. Archives: SDM2011-177 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We have confirmed the basic performance of a Logic-IP compatible (LIC) eDRAM with cylinder capacitors in the low-k/Cu BEOL layers. The LIC-eDRAM reduces the contact (CT) height, or essentially the RC delays due to the parasitic component to the contact. By circuit simulation, a 28-nm-node LIC-eDRAM with the reduced CT height controls the logic delay with Δτd <5% to that of 28-nm-node standard CMOS logics, enabling us ensure the logic IP compatibility. This was confirmed also by a 40-nm-node LIC-eDRAM test-chip fabricated. The 40-nm-node inverter delays in the test-chip were controlled actually within Δτd < 5%, referred to those of a pure-CMOS logic LSI. Meanwhile the retention time of the DRAM macro was in the range of milliseconds, which has no difference to that of a conventional eDRAM. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Embedded memory / DRAM / 28nm-node / Logic IP compatible / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 111, no. 463, SDM2011-177, pp. 7-11, March 2012. | |
| Paper # | SDM2011-177 | |
| Date of Issue | 2012-02-27 (SDM) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | SDM2011-177 Link to ES Tech. Rep. Archives: SDM2011-177 |
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| Conference Information | |
| Committee | SDM |
| Conference Date | 2012-03-05 - 2012-03-05 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Wiring and Assembly Technology, etc |
| Paper Information | |
| Registration To | SDM |
| Conference Code | 2012-03-SDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Basic Performance of a Logic-IP Compatible eDRAM with Cylinder Capacitors in Low-k/Cu BEOL Layers |
| Sub Title (in English) | |
| Keyword(1) | Embedded memory |
| Keyword(2) | DRAM |
| Keyword(3) | 28nm-node |
| Keyword(4) | Logic IP compatible |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Ippei Kume |
| 1st Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 2nd Author's Name | Naoya Inoue |
| 2nd Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 3rd Author's Name | Ken'ichiro Hijioka |
| 3rd Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 4th Author's Name | Jun Kawahara |
| 4th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 5th Author's Name | Koichi Takeda |
| 5th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 6th Author's Name | Naoya Furutake |
| 6th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 7th Author's Name | Hiroki Shirai |
| 7th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 8th Author's Name | Kenya Kazama |
| 8th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 9th Author's Name | Shin'ichi Kuwabara |
| 9th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 10th Author's Name | Msasatoshi Watarai |
| 10th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 11th Author's Name | Takashi Sakoh |
| 11th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 12th Author's Name | Toshifumi Takahashi |
| 12th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 13th Author's Name | Takashi Ogura |
| 13th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 14th Author's Name | Toshiji Taiji |
| 14th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 15th Author's Name | Yoshiko Kasama |
| 15th Author's Affiliation | Renesas Electronics Corporation (Renesas Electronics) |
| 16th Author's Name | |
| 16th Author's Affiliation | () |
| 17th Author's Name | |
| 17th Author's Affiliation | () |
| 18th Author's Name | |
| 18th Author's Affiliation | () |
| Speaker | Author-1 |
| Date Time | 2012-03-05 10:50:00 |
| Presentation Time | 30 minutes |
| Registration for | SDM |
| Paper # | SDM2011-177 |
| Volume (vol) | vol.111 |
| Number (no) | no.463 |
| Page | pp.7-11 |
| #Pages | 5 |
| Date of Issue | 2012-02-27 (SDM) |
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