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Paper Abstract and Keywords
Presentation 2011-12-16 15:25
Fabrication process of multi-layered amorphous silicon wire waveguides
JoonHyun Kang, Yuki Atsumi, Manabu Oda, Nobuhiko Nishiyama, Shigehisa Arai (Titech) Link to ES Tech. Rep. Archives: OPE2011-146
Abstract (in Japanese) (See Japanese page) 
(in English) Silicon photonics is a promising candidate as an on-chip interconnection in LSIs. a-Si can be deposited under 300°C by PECVD, which satisfies back-end process compatibility with current CMOS technology. In addition vertically stacked a-Si layers paired with SiO2 provide high density 3D optical circuit. In this paper, we fabricated multi-layer a-Si waveguides up to 3rd layer and revealed the relationship between the propagation loss and roughnesses. By reducing surface and sidewall roughnesses of each waveguide, the low propagation loss of 3.7 dB/cm for the 3rd layer a-Si waveguides was demonstrated.
Keyword (in Japanese) (See Japanese page) 
(in English) Silicon Photonics / Amorphous silicon / Multilayer waveguide / / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 358, OPE2011-146, pp. 27-32, Dec. 2011.
Paper # OPE2011-146 
Date of Issue 2011-12-09 (OPE) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Conference Information
Committee OPE  
Conference Date 2011-12-16 - 2011-12-16 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To OPE 
Conference Code 2011-12-OPE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Fabrication process of multi-layered amorphous silicon wire waveguides 
Sub Title (in English)  
Keyword(1) Silicon Photonics  
Keyword(2) Amorphous silicon  
Keyword(3) Multilayer waveguide  
1st Author's Name JoonHyun Kang  
1st Author's Affiliation Tokyo Institute of Technology (Titech)
2nd Author's Name Yuki Atsumi  
2nd Author's Affiliation Tokyo Institute of Technology (Titech)
3rd Author's Name Manabu Oda  
3rd Author's Affiliation Tokyo Institute of Technology (Titech)
4th Author's Name Nobuhiko Nishiyama  
4th Author's Affiliation Tokyo Institute of Technology (Titech)
5th Author's Name Shigehisa Arai  
5th Author's Affiliation Tokyo Institute of Technology (Titech)
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Date Time 2011-12-16 15:25:00 
Presentation Time 25 
Registration for OPE 
Paper # IEICE-OPE2011-146 
Volume (vol) IEICE-111 
Number (no) no.358 
Page pp.27-32 
#Pages IEICE-6 
Date of Issue IEICE-OPE-2011-12-09 

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